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TMS320F28379D: Software watchpoint

Lukas Brzyszkiewicz
Intellectual 335 points
Part Number: TMS320F28379D

Hello,

is this possible to use software watchpoints in F28379D CPU? I'm trying to configure registers for software watchpoint based on spra820 document, but this works only partially.

Configuration registers answer correctly, for example if I have breakpoints in CCS studio I cannot set breakpoint in software. But if I configure all registers RTOSINT isn't executed.

Can anyone help me with this matter? This is my code:

file.h

#define STACK_GUARD_MARGIN          50
#define STKOV_RANGEMASK             0x0007

struct WATCHPOINT_REGS {
    Uint32  WPMASK;
    Uint32  WPREF;
    Uint16  rsrvd1;
    Uint16  rsrvd2;
    Uint16  WPEVT_CNTL;
    Uint16  WPEVT_ID;
};

extern volatile struct WATCHPOINT_REGS Watchpoint0Regs;
extern volatile struct WATCHPOINT_REGS Watchpoint1Regs;
extern uint32 StackAddressBottom;
extern uint32 StackAddressTop;
extern uint32 StackSize;


file.c
    uint32 GuardAddress = ((uint32)(&StackAddressTop) - STACK_GUARD_MARGIN) & (uint32)(~STKOV_RANGEMASK);
    if ((GuardAddress < (uint32)(&StackAddressBottom)) || (GuardAddress > (uint32)(&StackAddressTop)))
    {
        asm(" ESTOP0");
        StackErrorOccured();
    }

    asm(" EALLOW");
    Watchpoint1Regs.WPEVT_CNTL = 0x0001;
    asm(" RPT #1 || NOP");
    if ((Watchpoint1Regs.WPEVT_ID & 0xC000) != 0x4000)
    {
        asm(" EDIS");
        asm(" ESTOP0");
        StackErrorOccured();
    }

    Watchpoint1Regs.WPMASK = (uint32)STKOV_RANGEMASK;
    Watchpoint1Regs.WPREF = GuardAddress | (uint32)STKOV_RANGEMASK;
    Watchpoint1Regs.WPEVT_CNTL = 0x081A;
    IER |= 0x8000;

    asm(" EDIS");


    /** test  **/
    uint32 *tst;
    tst = 0x07D0;
    *tst = 0xDEADBEEF;         // <- not working, RTOSINT isn't fired

*.CMD file:

        WATCHPOINT0_REGS    : origin = 0x000828, length = 0x000020
        WATCHPOINT1_REGS    : origin = 0x000848, length = 0x000020

  • 0
    TI__Expert 5940 points
    Hi Lukas,

    Per the application note SPRA820, bit 6 of EVT_CNTL is always supposed to be set to 1 so 0x085A should be written to this register, instead of the 0x081A value. You can double check that the chosen tst address doesn't require EALLOW before a write and outside the configured stack range. Rest of the configuration you've shared looks good to me.

    Just to clarify some terminology, “software breakpoints” can be set to stop execution – as many of these can be set in CCS when running from RAM build configuration. But when running from Flash configuration, this is not an option so “debug analysis (hardware) units” can be configured as “hardware breakpoints” which will be used by CCS when breakpoints are set. So if the program is running from Flash, you won’t be able to use the “hardware watchpoint” that you attempt to configure in your code and set breakpoints through CCS as there are limited “debug analysis units” available on the device.

    So if the “hardware watchpoint” is configured properly by your code, the RTOSINT should be generated in RAM configuration no matter how many “software breakpoints” are set and should be generated in Flash configuration if there aren't any “hardware breakpoints” set. Let us know if this is not the behavior you're seeing.

    This word of caution is mentioned in the app note:
    “The stack overflow code may be working just fine one minute, but then, for example, if the user sets a hardware breakpoint or enables the profiler, Code Composer Studio will take control of the analysis units and not provide any warning.”

    Here’s a resource on hardware breakpoints/watchpoints: processors.wiki.ti.com/.../Hardware_Breakpoints_and_Watchpoints_for_C28x_in_CCS
    “C28x devices have two analysis resources available at a time. One resource can be used as a hardware breakpoint, watchpoint, or counter. The other one can be used as a hardware breakpoint or watchpoint. So when working with hardware breakpoints, you are limited to 2 hardware breakpoints. “

    Regards,
    Elizabeth
  • 0 in reply to Elizabeth Joy
    Intellectual 335 points

    Hi,

    thank you for your answer.

    I've corrected 0x081A to 0x085A, but watchpoint still is not working. Value 0x081A is taken from code example in SPRA820.

    My code is running from Flash memory, but my problem isn't related to only 2 available breakpoints, but that RTOSINT isn't fired. Maybe I need to do much more than IER |= 0x8000 to turn RTOSINT? Also I'm checking after testing if WatchpointRegs are changed - but no, CCS don't overwritten this registers.

    So - maybe in this core watchpoints must configured in different way or I must enable RTOSINT in another way than only writting IER |= 0x8000?

  • 0 in reply to Lukas Brzyszkiewicz
    TI__Expert 5940 points
    Hi Lukas,

    In addition to setting IER, you also have to register the interrupt service routine you wish to execute in the PIE vector table's RTOSINT entry like this: PieVectTable.RTOSINT = <your application's ISR name>.

    Regards,
    Elizabeth
  • 0 in reply to Elizabeth Joy
    Intellectual 335 points
    Hi,

    setting vector table is obvious for me. Any other suggestions?

    Best regards,
    Łukasz
  • 0 in reply to Lukas Brzyszkiewicz
    TI__Expert 5940 points
    Hi,

    You can try placing the ISR in RAM with the CODE_SECTION pragma. It's a good idea to copy any time critical functions/ISRs to RAM.
    #pragma CODE_SECTION(<your application's ISR name>, ".TI.ramfunc");

    Also, have you double checked the Breakpoints window (open by navigating to View->Breakpoints) in CCS debug session and confirmed there aren't any set?

    Regards,
    Elizabeth
  • 0 in reply to Elizabeth Joy
    Intellectual 335 points

    Hi,

    in this week I will investigate this problem more and then I answer.

    Best regards, Łukasz B.

  • 0 in reply to Lukas Brzyszkiewicz
    TI__Expert 5940 points
    Hi Lukas,

    Thank you for the update. Let me know if I can be of assistance. If this is resolved, it would be nice if you can press the "This resolved my issue" button.

    Also, please note that threads are locked after 60 days with no activity. If this occurs to this post and you have a follow-up question, please feel free to click "Ask a related question" to follow-up. Thanks!

    Regards,
    Elizabeth