Compiler: F28069 ADC initial using epwm1int main isr failed.

Other Parts Discussed in Thread: CONTROLSUITE

Tool/software: TI C/C++ Compiler

Hello every senior engineers

I use F28069 to drive my 3-phase motor with SVPWM, and now I need to use ADC to read the current feedback information to implement the close loop current control

as setting ADC initial, I use the F2806XILEG_VDC_PM.H code in controlsuite and  imitate the structure of  PM_sensorless level 2  in  my MainISR

However, when I set the Enableflag to 1, the epwm1 ISR is stop and  CCS debug the jump to ILLEGAL_ISR(void) in F2806x_DefaultIsr.c

interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP
{
// Insert ISR Code here

// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm(" ESTOP0");
for(;;);

}

I have look up the tech-manual and the following are my relevant code 

could you tell me what I miss or  where I am wrong? thank you very much 

///////my ADC initial code////

#define ADC_MACRO() \
\
DELAY_US(ADC_usDELAY); \
AdcRegs.ADCCTL1.all=ADC_RESET_FLAG; \
asm(" NOP "); \
asm(" NOP "); \
\
EALLOW; \
AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; /* Power up band gap */ \
\
DELAY_US(ADC_usDELAY); /* Delay before powering up rest of ADC */ \
\
AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; \
AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; /* Power up reference */ \
AdcRegs.ADCCTL1.bit.ADCPWDN = 1; /* Power up rest of ADC */ \
AdcRegs.ADCCTL1.bit.ADCENABLE = 1; /* Enable ADC */ \
\
asm(" RPT#100 || NOP"); \
\
AdcRegs.ADCCTL1.bit.INTPULSEPOS=1; \
AdcRegs.ADCCTL1.bit.TEMPCONV=0; \
\
DELAY_US(ADC_usDELAY); \
\
/******* CHANNEL SELECT *******/ \
\
\
AdcRegs.ADCSOC0CTL.bit.CHSEL = 1; /* ChSelect: ADC A1-> Phase U Churrent*/ \
AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; /* Set SOC0 start trigger on EPWM1A, due to round-robin SOC0 converts first then SOC1*/ \
AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; /* Set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)*/ \
\
AdcRegs.ADCSOC1CTL.bit.CHSEL = 9; /* ChSelect: ADC B1-> Phase V Current*/ \
AdcRegs.ADCSOC1CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC1CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC2CTL.bit.CHSEL = 10; /* ChSelect: ADC B2-> DC Bus Voltage*/ \
AdcRegs.ADCSOC2CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC2CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC3CTL.bit.CHSEL = 15; /* ChSelect: ADC B7-> V Phase A */ \
AdcRegs.ADCSOC3CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC3CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC4CTL.bit.CHSEL = 7; /* ChSelect: ADC A7-> V Phase B */ \
AdcRegs.ADCSOC4CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC4CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC5CTL.bit.CHSEL = 12; /* ChSelect: ADC B4-> V Phase C */ \
AdcRegs.ADCSOC5CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC5CTL.bit.ACQPS = 6; \
\
AdcRegs.ADCSOC6CTL.bit.CHSEL = 2; /* ChSelect: ADC A2-> Low Side DC Bus Return Cur.*/ \
AdcRegs.ADCSOC6CTL.bit.TRIGSEL = 5; \
AdcRegs.ADCSOC6CTL.bit.ACQPS = 6; \
\
EDIS; \
\
\
/* Set up Event Trigger with CNT_zero enable for Time-base of EPWM1 */ \
EPwm1Regs.ETSEL.bit.SOCAEN = 1; /* Enable SOCA */ \
EPwm1Regs.ETSEL.bit.SOCASEL = 1; /* Enable CNT_zero event for SOCA */ \
EPwm1Regs.ETPS.bit.SOCAPRD = 1; /* Generate SOCA on the 1st event */ \
EPwm1Regs.ETCLR.bit.SOCA = 1; /* Clear SOCA flag */

///////at the end of my mainisr code////

// Clear INT flag for this timer
EPwm1Regs.ETCLR.bit.INT = 1;

// Acknowledge this interrupt to receive more interrupts from group 3
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;