Hello
I noticed that the position manager has support for Endat2.2 and Biss-C. On our current design, I have the Hiperface DSL IP core implemented in a stand-alone FPGA. I would like to know if Hiperface DSL IP core can be supported by Position's Manager CLB block on this chip. Also, is it possible to have more than 1 instances of Hiperface DSL IP in the single chip?
Thanks
Alan