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TMS320F28379D: PWM and GPIO random output at stop

Part Number: TMS320F28379D

Hello everyone,

I have trouble with PWM output on my application : I have to drive IGBT drivers with PWM, everything works correctly  (GPIO0-5, PWM1-2-3) when the system is running but when I am stopping the PWM, some GPIO stay to high level (randomly).

I think I have the same problem than this post : e2e.ti.com/.../679411

In my case I have already configured the TZ, here you have a view of my stop function and on the right the output AFTER stop :

Do you see other point which I can forget please ?

EDIT1 : It seems that the output stay in the same state when the stop occurs.

EDIT2: when a GPIO is in output mode, if I am externally puting +3.3v on the pin, does the emulator will see high state level ? 

EDIT3: Can you explain me what are shadow registers please ? I have read some things on various datasheets and internet but I still in lack of understanding ... Could it be the source of my problem ?

Thank you very much and have a nice day,

Jérémy

  • Hi

    By default TBCTL.FREE_SOFT == 0, which is stop PWM counter when you click pause in debugger, PWM output is kept low/high depending on when you stop it. You have two more options, 1x - keep PWM running (with current duty cycle), 01 - stop counter when PWM cycle completes. 01 is fine for single phase apps, for multiphase it may brake phase synchronization. For multiphase I'm using free run and set TZ unit to switch off high side switches on TZ6 (EMUSTOP).

    Certainly someone could explain shadow regs better, shadow registers help applying things like duty cycle at the right moment. For example, if compare register wouldn't have shadow and would be applied immediately (not somewhere at the end of PWM period), then writing new compare value you could sometimes see missing PWM pulse.

    Edward
  • Hi Edward, thank you for your reply,

    The point is I am not stopping execution via emulator, the program is still running and output troubles appear when I am using physical ON/OFF button of my system, CCS is only used to visualise outputs and registers (I have also a scope for pwm outputs).

    Output are stuck to high even if TZFLAG are active and outputs forced to low level
  • Oh, I see. Did you configure TZCTL? By default all fields are 00, which is set pin to high impedance state. Is this your problem?

    Edward
  • Hi,

    Yes I am using DCAEVT1 and DCAEVT2 (I haven't precisly understood the difference between CBC and One shot trip, but it's not the point yet), configured in Force Low.

    I haven't precised for not influence your answer but I am using voltage level translator bi-directionnal with automatic direction and bus hold technology. 

    www.onsemi.com/.../FXMA108-D.pdf (but i am trying to make my manager change for TI device :) )

    We have found that if we put external pull down resistor in PWM output (which is also translator input) the device is working correctly. Indeed for change the state of the voltage translator we need to have minimum di/dt.

    The question is why everything is working good when PWM is active but not when the PWM is Stopped ? Does the type of output (Normal or open drain or Pull up/down or other) can change by itself when the PWM peripherical is in working tripped or stopped state ?

    Thank you very much,

    Jérémy

  • Hi,

    • We have found that if we put external pull down resistor in PWM output (which is also translator input) the device is working correctly

    This just confirms that trip force action is set up wrong, you have force high impedance instead of force low. Configuring TZCTL you should keep in mind that all actions are set to force high impedance by default. Perhaps different action takes precedence and you have high impedance instead of force low. I had the same problem, using DCAEVT1 and DCAEVT2 I had to set everything but TZA in TZCTL to Do Nothing, only then A-events where forcing output low as expected.

    It would be nice to have some better zone config explanation than in UM.

    Regards,

    Edward

  • Hi Edward, thank you for your advice, it's working good !!

    For me it's the opposite, DCAEVT1 and DCAEVT2 do nothing but TZA and TZB do. In doubt, I have configured all the registre and I am triggering all event ... Indeed it would be nice I we could have more information.

    Anybody have explanation or application note or documentation plaese ?

    Thank you and have  a nice day,

    Jérémy

  • Hi Jeremy, (& Edward)

    I'm glad you've been able to identify a solution. 

    I will admit that there is a lot of nuance to the way the trip zone interacts with the PWM.  Edward has given some solid advice. 
    (making sure that all bits in TZCTL are explicitly set to 'do nothing' when you don't want to use them, etc)

    The TRM explains the situation, but perhaps not as well as it could - at the same time it's difficult to explain what's going on with verbiage alone.  I find the figure labeled 'Trip-Mode Submodule Mode Control Logic' to be critical in understanding (and we've tried to improve it over the years). 

    Of specific note is that DCxEVTn, coming out of the comparator, can directly affect the ePWM output in what is sometimes called a SYSCLK-by-SYSCLK force.  This is what the DCxEVTn bits within the TZCTL register enable/disable. This can be extremely useful in relatively unique situations, but most often it isn't used & is often misunderstood.


    Thank you,
    Brett