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CCS/TMS320F28379D: SPI

Part Number: TMS320F28379D


Tool/software: Code Composer Studio

Hello ,

there is a question  ,and need  suggestion.
Now I want to use spib, GPIO24,GPIO25,GPIO26,GPIO27 in cpu2.

cpu1 code: set gpio to cpu2 and spi mode.
GPIO_SetupPinOptions(24, GPIO_INPUT, GPIO_PULLUP|GPIO_ASYNC);
GPIO_SetupPinMux(24, GPIO_MUX_CPU2, 0x06);
GPIO_SetupPinOptions(25, GPIO_INPUT, GPIO_PULLUP|GPIO_ASYNC);
GPIO_SetupPinMux(25, GPIO_MUX_CPU2, 0x06);
GPIO_SetupPinOptions(26, GPIO_INPUT, GPIO_PULLUP|GPIO_ASYNC);
GPIO_SetupPinMux(26, GPIO_MUX_CPU2, 0x06);
GPIO_SetupPinOptions(27, GPIO_INPUT, GPIO_PULLUP|GPIO_ASYNC);
GPIO_SetupPinMux(27, GPIO_MUX_CPU2, 0x06);
DevCfgRegs.CPUSEL6.bit.SPI_B = 1; //CPU2 SPI-B

cpu2 code: setup fifo and enable interrupt in main function
SpibRegs.SPIFFTX.all = 0xC060; // Enable FIFOs, Enable TX FIFO interrupt ,set TX FIFO level to 16
SpibRegs.SPIFFRX.all = 0x0070; // Enable Receive FIFO interrupt, Set RX FIFO level to 16 , clear FFRXINT flag
SpibRegs.SPIFFCT.all = 0x00;
SpibRegs.SPIFFTX.bit.TXFIFO=1;
SpibRegs.SPIFFRX.bit.RXFIFORESET=1; // Receive FIFO Reset
SpibRegs.SPICCR.bit.SPISWRESET = 0;
SpibRegs.SPICCR.bit.CLKPOLARITY = 0;
// SpibRegs.SPICCR.bit.SPICHAR = (16-1);
SpibRegs.SPICCR.bit.SPICHAR = (8-1);
// SpibRegs.SPICCR.bit.SPILBK = 0;
SpibRegs.SPICCR.bit.SPILBK = 0;
// Enable master (0 == slave, 1 == master)
// Enable transmission (Talk)
// Clock phase (0 == normal, 1 == delayed)
// SPI interrupts are disabled
SpibRegs.SPICTL.bit.MASTER_SLAVE = 1;
// SpibRegs.SPICTL.bit.MASTER_SLAVE = 0;
SpibRegs.SPICTL.bit.TALK = 1;
SpibRegs.SPICTL.bit.CLK_PHASE = 0;
SpibRegs.SPICTL.bit.SPIINTENA = 0;
// Set the baud rate
SpibRegs.SPIBRR.bit.SPI_BIT_RATE = SPI_BRR; //500KHz
SpibRegs.SPIPRI.bit.FREE = 1;
// Release the SPI from reset
SpibRegs.SPICCR.bit.SPISWRESET = 1;


cpu2 code in cputimer statemachine , every 3ms polling the interrupt flag:
if (1 == SpibRegs.SPIFFRX.bit.RXFFINT )
{
for( i= 0; i<16 ; i++)
{
rdata[i] = SpibRegs.SPIRXBUF; // Read data
}
SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1; // Clear Overflow flag
SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
}

if (1 == SpibRegs.SPIFFTX.bit.TXFFINT) //when dsp is sending data , sclk is running and ste is pull down to low.
{

for( i= 0; i<16 ; i++)
{

sdata[i] ++;
if (sdata[i] == 0x100) sdata[i] = 0;
SpibRegs.SPITXBUF= sdata[i]; // Send data
}
SpibRegs.SPIFFTX.bit.TXFFINTCLR=1; // Clear Interrupt flag
}



My issue is that cpu2 can receive data , ste pull down when clk run .but no data is on my simo pin. I use Oscilloscope to detect ste ,clk and somi, all pins are ok except simo. Simo pin display low on the Oscilloscope screen.