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CCS/LAUNCHXL-F28379D: LAUNCHXL-F28379D

omer gundogmus
Intellectual 345 points

Part Number: LAUNCHXL-F28379D

Tool/software: Code Composer Studio

Hello,

I am doing ADC Conversion using PWM. I have configured PWM and ADC as below. I am trying to read more than 50 KHz signal but my ADC conversion has disturbance after 10 KHz. According to my configuration I am suppose read signal at this frequencies. Even if I reduce TBPRD=400 and I can not go further below, if I go further below signal gets worst. My SYSCLOCKOUT=200 MHz. My code and ADC conversion plots are shown below. Thank you. 

void ConfigureADC(void)

{

   EALLOW;

 

   //

   //write configurations // ............................OK

   //

   AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4

   AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE); //........OK

 

   AdcbRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4

   AdcSetMode(ADC_ADCB, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE); //........OK

 

   AdcbRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4

   AdcSetMode(ADC_ADCB, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE); //........OK

 

   //

   //Set pulse positions to late.........................................OK

   //

   AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1; // ............................OK

   AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1; // ............................OK

   AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1; // ............................OK

 

   //

   //power up the ADC ...................................................OK

   //

   AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;   // ............................OK

   AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;   // ............................OK

   AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;   // ............................OK

   //

   //delay for 1ms to allow ADC time to power up

   //

   DELAY_US(1000);

 

   EDIS;

}

 

void ConfigureEPWM(void)

{

   EALLOW;

   // Assumes ePWM clock is already enabled

   ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV=1;

 

   EPwm1Regs.ETSEL.bit.SOCAEN   = 0;   // Disable SOC on A group

   EPwm1Regs.ETSEL.bit.SOCASEL   = 4;   // Select SOC on up-count

   EPwm1Regs.ETPS.bit.SOCAPRD = 1;       // Generate pulse on 1st event

   //EPwm1Regs.CMPA.bit.CMPA = 0x0800;    // Set compare A value to 2048 counts

   //EPwm1Regs.TBPRD = 0x1000;             // Set period to 4096 counts

 

   EPwm1Regs.CMPA.bit.CMPA =200;     // Set compare A value to 2048 counts

   EPwm1Regs.TBPRD = 400;             // Set period to 4096 counts

 

   EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;

   EPwm1Regs.TBCTL.bit.CTRMODE = 3;     // freeze counter

   EDIS;

}

 

void SetupADCEpwm()

{

 

 

   //

   //determine minimum acquisition window (in SYSCLKS) based on resolution

   //

 

 

   //

   //Select the channels to convert and end of conversion flag

   //

   EALLOW;

 

   // Ph CURRENTS ---------------------------------------------

 

   // Ph A Current

       AdcaRegs.ADCSOC0CTL.bit.CHSEL = 14; // ADCIN14

       AdcaRegs.ADCSOC0CTL.bit.ACQPS = 14; //sample window is xx SYSCLK cycles 14 ns

       AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C

     // Interrupt

       AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag

       AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;   //enable INT1 flag

       AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared

 

 

   EDIS;

}

interrupt void adca1_isr(void)

{

   Ia= AdcaResultRegs.ADCRESULT0;         // ---------------------------------- OK

 

   //AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT0;

   AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT0;

   if(RESULTS_BUFFER_SIZE <= resultsIndex)

   {

       resultsIndex = 0;

       bufferFull = 1;

   }

   AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag

   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

}ADC Fault.docx

 

  • 0
    TI__Guru 60865 points

    Hi Omer,

    It looks like your 3rd ADC set mode and set prescale is configuring ADC-B again, not ADC-C.

    I'm also not sure you should set  EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0.  The maximum ePWM clock is 100MHz. 

    Do you get the correct sample spacing, but the result is distorted, or do you just get garbage after you push the ePWM to some frequency? 

    • In the first case, what is your source?  Are you leaving the source settings the same as you increase the sample rate?  Is the source buffered?  Would increased frequency of ADC kick-back (if unbuffered) distort the signal?
    • In the second case you probably want to continue to look at the SW settings.  

  • 0 in reply to Devin Cottier
    Intellectual 345 points

    Hello Devin,

    Thank you for your answer. I did following steps: 

    • I corrected 3rd ADC set mode and set prescale which was configuring ADC-B again, not ADC-C.
    • I set  EPwm1Regs.TBCTL.bit.HSPCLKDIV = 1. Because my SYSCLCK=200 MHz, than I get ePWM clock is 100 MHz.
    • I am giving source signal from signal generator sinusoidal signal 1-60 KHz signal.
    • The problem is when I increase the frequency 1-30 KHz is OK, after 30 KHz, sinusoidal signal gets distorted. I am increasing sample rate with decreasing EPwm1Regs.TBPRD and I can not go below 380 if I go below also 1-30 KHz signal are also distorted. I am sending plots and codes in the attachment file.

    Please see codes and plots in the attachment file. 

    ADC Fault2.docx

  • 0 in reply to omer gundogmus
    TI__Guru 60865 points
    Hi Omer,

    I'm pretty sure you don't want to re-sync the ePWM in the ISR:
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;

    It also seems like the signal is distorted in all cases; even in the 10KHz case you have a pretty pointy sine wave which doesn't seem right.
  • 0 in reply to Devin Cottier
    Intellectual 345 points
    Hello Devin,
    I removed re-sync the e-PWM in the ISR function (adca1_icr). Results are same.

    Regards,

    Omer
  • 0 in reply to omer gundogmus
    Intellectual 870 points
    Hi Omer,

    A few things I would look at:

    - You can bring your ADCSOC signal from the EPWM to a GPIO through the Output X-Bar. It would be good to plot that to verify your ADC is being triggered when you think it is.

    - I'm a bit skeptical of the graphing feature in CCS. I think there's a refresh rate in one of the settings somewhere. Make sure it is set high enough to keep up with your measurements. You may want to dump your data into an array and export it into Excel or something just to double check the graph.

    Regards,
    Kris
  • 0 in reply to Kris Parrent
    Intellectual 345 points

    Hello Kris, 

    Thank you for your respond. I have transferred my data to excel there was same problem. 

    - I have checked my PWM1A signal it works fine I am getting enough frequency resolution. 

    - Please could you explain me how to get "ADCSOC signal from the EPWM to a GPIO through the Output X-Bar" signal ?

    Thank you for your help. 

    Regards,

    Omer 

  • 0 in reply to omer gundogmus
    Intellectual 870 points
    Omer,

    There are two signals ADCSOCAO and ADCSOCBO which are generated by the PWM and go through the Output X-Bar. The Output X-Bar appears on the GPIO mux (OUTPUTXBAR1-8). Any of them will work.

    Take a look at the X-Bar chapter in the TRM. It is pretty simple setup. I don't think you need to make any changes to the PWM since you are already generating the SOC but there may be something small to do.

    Regards,
    Kris