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CCS/TMS320F28335: SCI Receive FIFO 10 bit wide register

Part Number: TMS320F28335


Tool/software: Code Composer Studio

Respected Sir/Madam,

I have tried to send 8 bit data from hercules to Tms320F28335DSp through UART comunication, but as the FIFO receive register is 10 bits wide and SCIRXBUF is 8 bit wide (SCIRXBUF 7-0), how can get the correct received data.

So how can I initialize FIFO receive register (10wide) to 8 bit wide?

The RXSHF register is 10 bits wide or not?

I have used 9600 baud rate on both sides of communication.

ScibRegs.SCIHBAUD =0x0001;
ScibRegs.SCILBAUD =0x00E7;

Finally I'm not able to receive the correct data if I send 0xAB from Hercules I have received 0x4B and 0x5B  (SCIRXBUF) in watch window. 

Please help me out as soon as as possible.

Yours Sincerely,

Joshi

  • Mahesh,

    The data path registers (FIFOs, BUF, etc.) are all 8-bits wide. Additionally, the registers in the SCI module are 8-bit registers. When a register is accessed, the register data is in the lower byte (7–0), and the upper byte (15–8) is read as zeros. Writing to the upper byte has no effect. Please see the TMS320x2833x, 2823x Serial Communications Interface (SCI) Reference Guide - SPRUFZ5:

    www.ti.com/lit/SPRUFZ5

    I am not sure what you are referring to with 10-bit registers. See the block diagram in Figure 1-2 on page 13.

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken
  • Respected sir,

    In datasheet page no.25 ,It is mentioned as receive FIFO registers are 10 bits wide.(www.ti.com/lit/SPRUFZ5). If It is 10 bit then how to access the 8 bit ? plz provide your valuable suggestion.

  • Mahesh,

    The receive FIFO registers are 10 bits wide, where the first 8 bits is the data, also known as a character, and the remaining two bits are for the optional parity and address-bit mode. The 8 bit character appears in the SCIRXBUF and the two optional bits are automatically removed by the peripheral hardware.

    I hope this answers your question.

    - Ken
  • Dear sir,

               the remaining two bits are for the optional parity and address-bit mode.If I used the these two bits.then how I identify these two bits while receiving in SCIRXBUF?

    yours Faithfully,

    Joshi

  • Mahesh,

    The SCIRXBUF receiver data buffer register is 8 bits wide and it contains the data to be read by the CPU. The extra two bits in the receive FIFO registers used for the optional parity and address-bit mode are not available to the user and these bits are automatically removed by the peripheral hardware.

    I hope this answers your question.

    - Ken
  • Dear sir,

                thank you sir.now its work fine ..your valuable suggestion helps me.

  • Mahesh,

    Thank you for the update, and I am glad it is working. I will now close this thread.

    - Ken