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TMS320F2812: Low or Incorrect ADC Values on eZdsp Eval Board

Part Number: TMS320F2812


I am currently using an eZdsp F2812 evaluation board and trying to get the ADC to work.  I have configured the ADC for sequential sampling cascaded sequencer mode (as shown in the InitADC function below).  There is no external reference voltage used in these conversions.  The Development Environment is Code Composer Suite v7 (7.3.0).

Using the eval board, we have added wiring that connect certain DC voltages on the board to the ADC inputs on P5/P9 (Analog Inputs).

void InitADC(struct ADC_VARIABLES_TYPE *ADCvalues)
{
    AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x3;    // Power up bandgap/reference circuitry
    DELAY_US(ADC_8msDELAY);                 // Delay before powering up rest of ADC
    AdcRegs.ADCTRL3.bit.ADCPWDN   = 1;      // Power up rest of ADC
    DELAY_US(ADC_20usDELAY);                // Delay after powering up ADC

    AdcRegs.ADCTRL1.bit.ACQ_PS    = ADC_SHCLK;
    AdcRegs.ADCTRL3.bit.ADCCLKPS  = ADC_CKPS;
    AdcRegs.ADCTRL3.bit.SMODE_SEL = 0;       // 0 = Sequential (not simultaneous)
    AdcRegs.ADCTRL1.bit.SEQ_CASC  = 1;       // 1 = Cascaded (not dual)
    AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0xF;  // Setup 16 conversions

    /* Analog channels selected in sequential order */
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1;
    AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2;
    AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3;
    AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x4;
    AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5;
    AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x6;
    AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x7;
    AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0x8;
    AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0x9;
    AdcRegs.ADCCHSELSEQ3.bit.CONV10 = 0xA;
    AdcRegs.ADCCHSELSEQ3.bit.CONV11 = 0xB;
    AdcRegs.ADCCHSELSEQ4.bit.CONV12 = 0xC;
    AdcRegs.ADCCHSELSEQ4.bit.CONV13 = 0xD;
    AdcRegs.ADCCHSELSEQ4.bit.CONV14 = 0xE;
    AdcRegs.ADCCHSELSEQ4.bit.CONV15 = 0xF;

    AdcRegs.ADCTRL1.bit.CONT_RUN = 0;       // Start-Stop Mode

    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;       // Reset SEQ1

} /* InitADC */

After calling the InitADC (along with the other DSP Initialization routines), I call the StartADCConversion function.

void StartADCConversion()
{
    // Start New Conversion
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1

    // Start of Conversion.  Cannot be done at same time as reset
    AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 1;

} /* StartADCConversion */

At present, I’m looking at the raw numbers that the ADC provides for each of the voltages it samples. Refer to the ProcessADC function below.  When I step through the code and observe the values from the analog-to-digital conversion, they are lower than I am expecting.  Refer to the table below.

void ProcessADC(struct ADC_VARIABLES_TYPE *ADCvalues)
{
    if (!AdcRegs.ADCST.bit.SEQ1_BSY)
    {
        ADCvalues->rawValue.adcina0 = AdcRegs.ADCRESULT0  >> 4;
        ADCvalues->rawValue.adcina1 = AdcRegs.ADCRESULT1  >> 4;
        ADCvalues->rawValue.adcina2 = AdcRegs.ADCRESULT2  >> 4;
        ADCvalues->rawValue.adcina3 = AdcRegs.ADCRESULT3  >> 4;
        ADCvalues->rawValue.adcina4 = AdcRegs.ADCRESULT4  >> 4;
        ADCvalues->rawValue.adcina5 = AdcRegs.ADCRESULT5  >> 4;
        ADCvalues->rawValue.adcina6 = AdcRegs.ADCRESULT6  >> 4;
        ADCvalues->rawValue.adcina7 = AdcRegs.ADCRESULT7  >> 4;
        ADCvalues->rawValue.adcinb0 = AdcRegs.ADCRESULT8  >> 4;
        ADCvalues->rawValue.adcinb1 = AdcRegs.ADCRESULT9  >> 4;
        ADCvalues->rawValue.adcinb2 = AdcRegs.ADCRESULT10 >> 4;
        ADCvalues->rawValue.adcinb3 = AdcRegs.ADCRESULT11 >> 4;
        ADCvalues->rawValue.adcinb4 = AdcRegs.ADCRESULT12 >> 4;
        ADCvalues->rawValue.adcinb5 = AdcRegs.ADCRESULT13 >> 4;
        ADCvalues->rawValue.adcinb6 = AdcRegs.ADCRESULT14 >> 4;
        ADCvalues->rawValue.adcinb7 = AdcRegs.ADCRESULT15 >> 4;

    }

} /* ProcessADC */

I’ve summarized the observations in the table below and highlighted the low or incorrect values. My question is why am I getting these readings?

Name

ADC Value

Input Voltage

Expected Value

adcina0

0

0

0

adcina1

0

0

0

adcina2

0

3.13

4095

adcina3

1264

3.13

4095

adcina4

1114

3.14

4095

adcina5

913

3.15

4095

adcina6

0

0

0

adcina7

0

0

0

adcinb0

0

1.8

2458

adcinb1

882

3.13

4095

adcinb2

728

3.11

4095

adcinb3

0

0

0

adcinb4

0

3.13

4095

adcinb5

0

1.87

2553

adcinb6

779

3.15

4095

adcinb7

660

3.14

4095

  • Larry,

    Can you try the adc_seqmode_test example from the F281x Headers and Examples package to make sure that your board is at least converting A0 correctly?

    \tidcs\c28\DSP281x\v120\DSP281x_examples_ccsv4\adc_seqmode_test

    If that works, it should be straightforward to verify that the other channels are working by adding them to the example.  Then you can compare the register settings from the example against your custom code.

    -Tommy

  • I was successful in running the adc_seqmode_test, but the values that I received had the value of 0. I injected 1.8V and I should be expecting 2458 from the analog-to-digital conversion. The same software/hardware configuration was conducted on two other eZdsp eval boards with same results.

    I have added a wire from the 1.8V (VDD1) on the eZdsp eval board to adcina0. Referring to the schematic, this power rail is referenced to digital ground. Are the signal inputs to the ADC referenced to analog or digital ground on this board? Because I’m running the example code unmodified, I’m thinking the only thing different is the way I have it white-wired. In addition, I read where the unused ADC input signal pins should be tied to ground, is this necessary for this test to succeed?

    Another observation that I made was on the adcina0 input pin during my debugger session running the example code. I measured the adcina0 pin before the initialization routines and it measured 0V. Once the initialization (including the ADC initialization) was performed, the voltage on this pin was 2.9V (measured with a DVM. This was with no extra input on my part. In fact, I found it interesting when I checked all of the eZdsp boards (4) that we have in the lab. On all of them, they behaved the same as mentioned above – 0V before init, 2.9V after init. I’m not sure if this is the behavior of the ADC inputs to the F2812.
  • Larry Lamb said:
    I was successful in running the adc_seqmode_test, but the values that I received had the value of 0. I injected 1.8V and I should be expecting 2458 from the analog-to-digital conversion. The same software/hardware configuration was conducted on two other eZdsp eval boards with same results.

    This is unexpected.

    Larry Lamb said:
    I have added a wire from the 1.8V (VDD1) on the eZdsp eval board to adcina0. Referring to the schematic, this power rail is referenced to digital ground. Are the signal inputs to the ADC referenced to analog or digital ground on this board?

    The ADC inputs are referenced to AGND, however analog AGND and digital GND are connected at TP2.

    For best performance, you would want to connect the ground reference of the input signal to AGND on the header like a differential pair.  For debug, the TP2 short will suffice.

    Did you connect VREFLO to AGND?

    Larry Lamb said:
    Because I’m running the example code unmodified, I’m thinking the only thing different is the way I have it white-wired. In addition, I read where the unused ADC input signal pins should be tied to ground, is this necessary for this test to succeed?

    You can leave the unused ADC signals floating.  The recommendation to connect unused ADC pins to ground is to satisfy customers who require specific guidance for handling unused pins.

    Larry Lamb said:
    Another observation that I made was on the adcina0 input pin during my debugger session running the example code. I measured the adcina0 pin before the initialization routines and it measured 0V. Once the initialization (including the ADC initialization) was performed, the voltage on this pin was 2.9V (measured with a DVM. This was with no extra input on my part. In fact, I found it interesting when I checked all of the eZdsp boards (4) that we have in the lab. On all of them, they behaved the same as mentioned above – 0V before init, 2.9V after init. I’m not sure if this is the behavior of the ADC inputs to the F2812.

    This is generally not expected.  The ADC sample capacitor is not preconditioned before sampling the pin so the capacitor can retain charge between conversions.  This might explain why you see some voltage on the pin, but it's strange to have 2.9V consistently between boards.

  • VREFLO was not connected to AGND.  Once this was connected, the adcina0 value became more in line with the expected value, i.e., 2616 for ~1.8V.  I believe this corrected the problem and I can proceed with the remaining analog-to-digital conversions on the full-up test configuration.

  • Larry,

    Glad that it works now. Thanks for reporting the solution.

    -Tommy