Tool/software: Code Composer Studio
When I debugging my code and calling function "GPIO_setDirection(myGpio, GPIO_Number_29, GPIO_Direction_Output);" getting an error " 0x222b0f: ???? Memory map prevented reading 0x222B0F@Program [code=0x20000]" I tried all tread in the forum and nun of them not working for me. My code was working fine i did some changes in i2c function i faced this issue. Even i removed it doesn't back to normal. I have changed heap and stack to 0x400 that also not working for me. Pleas help to solve this issue.
CCS v8.1.0
few lines of my code
void main(void)
{
// delay_ms(100);
init_variables();
init_pheripharals();// Initialize all the handles needed for this application
init_system(); // Perform basic system initialization
// LCD_ILI9341_init();
Config_gpio();
CLK_enableI2cClock(myClk);// enable I2C CLK
GPIO_setMode(myGpio, GPIO_Number_32, GPIO_32_Mode_SDAA); //Pin J2.6 of Launchpad is used for SDA
GPIO_setMode(myGpio,GPIO_Number_33,GPIO_33_Mode_SCLA); //Pin J2.7 of Launchpad is SCL
init_i2c();
Config_adc();
Config_timers();
GPIO_setDirection(myGpio, GPIO_Number_29, GPIO_Direction_Output); // here i am getting error
GPIO_setDirection(myGpio, GPIO_Number_17, GPIO_Direction_Output);
LCD_ILI9341_init();
................................
................................
............................
...................
gel file
/********************************************************************/
/* f28027.gel */
/* Version 4.00.5 */
/* */
/* This GEL file is to be used with the TMS320F28027 DSP. */
/* Changes may be required to support specific hardware designs. */
/* */
/* Code Composer Studio supports six reserved GEL functions that */
/* automatically get executed if they are defined. They are: */
/* */
/* StartUp() - Executed whenever CCS is invoked */
/* OnReset() - Executed after Debug->Reset CPU */
/* OnRestart() - Executed after Debug->Restart */
/* OnPreFileLoaded() - Executed before File->Load Program */
/* OnFileLoaded() - Executed after File->Load Program */
/* OnTargetConnect() - Executed after Debug->Connect */
/* */
/********************************************************************/
StartUp()
{
}
int emu_boot_set = 0;
OnReset(int nErrorCode)
{
if (GEL_IsInRealtimeMode()) /* If in real-time-mode */
{
}
else /* Put device in C28x mode */
{
C28x_Mode();
}
Unlock_CSM();
Device_Cal();
// Uncomment for the desired boot-mode on a reset:
// EMU_BOOT_SARAM(); /* Set EMU Boot Variables - Boot to SARAM */
// EMU_BOOT_FLASH(); /* Set EMU Boot Variables - Boot to flash */
}
OnRestart(int nErrorCode)
{
/* CCS will call OnRestart() when you do a Debug->Restart and */
/* after you load a new file. Between running interrupt based */
/* programs, this function will clear interrupts and help keep */
/* the processor from going off into invalid memory. */
if (GEL_IsInRealtimeMode()) /* If in real-time-mode */
{
}
else /* Put device in C28x mode */
{
C28x_Mode();
}
IER = 0;
IFR = 0;
}
OnPreFileLoaded()
{
GEL_Reset();
}
OnFileLoaded(int nErrorCode, int bSymbolsOnly)
{
if (!bSymbolsOnly) {
Device_Cal();
}
}
OnTargetConnect()
{
if (GEL_IsInRealtimeMode()) /* If in real-time-mode */
{
}
else /* Put device in C28x mode */
{
C28x_Mode();
}
F28027_Memory_Map(); /* Initialize the CCS memory map */
/* Check to see if CCS has been started-up with the DSP already */
/* running in real-time mode. The user can add whatever */
/* custom initialization stuff they want to each case. */
if (GEL_IsInRealtimeMode()) /* Do real-time mode target initialization */
{
}
else /* Do stop-mode target initialization */
{
GEL_Reset(); /* Reset DSP */
}
}
/********************************************************************/
/* These functions are useful to engage/disengage realtime */
/* emulation mode during debug. They save the user from having to */
/* manually perform these steps in CCS. */
/********************************************************************/
menuitem "Realtime Emulation Control";
hotmenu Run_Realtime_with_Reset()
{
GEL_Reset(); /* Reset the DSP */
ST1 = ST1 & 0xFFFD; /* clear DBGM bit in ST1 */
GEL_EnableRealtime(); /* Enable Realtime mode */
GEL_Run(); /* Run the DSP */
}
hotmenu Run_Realtime_with_Restart()
{
GEL_Restart(); /* Reset the DSP */
ST1 = ST1 & 0xFFFD; /* clear DBGM bit in ST1 */
GEL_EnableRealtime(); /* Enable Realtime mode */
GEL_Run(); /* Run the DSP */
}
hotmenu Full_Halt()
{
GEL_DisableRealtime(); /* Disable Realtime mode */
GEL_Halt(); /* Halt the DSP */
}
hotmenu Full_Halt_with_Reset()
{
GEL_DisableRealtime(); /* Disable Realtime mode */
GEL_Halt(); /* Halt the DSP */
GEL_Reset(); /* Reset the DSP */
}
/********************************************************************/
/* These functions are launched by the GEL_Toolbar button plugin */
/********************************************************************/
GEL_Toolbar1()
{
Run_Realtime_with_Reset();
}
GEL_Toolbar2()
{
Run_Realtime_with_Restart();
}
GEL_Toolbar3()
{
Full_Halt();
}
GEL_Toolbar4()
{
Full_Halt_with_Reset();
}
GEL_Toolbar5()
{
Full_Halt_with_Reset();
GEL_Restart();
}
/********************************************************************/
/* F28027 Memory Map */
/* */
/* Note: M0M1MAP and VMAP signals tied high on '28027 core */
/* */
/* 0x000000 - 0x0003ff M0 SARAM (Prog and Data) */
/* 0x000400 - 0x0007ff M1 SARAM (Prog and Data) */
/* 0x000800 - 0x001fff Peripheral Frame0 (PF0) (Data only) */
/* 0x006000 - 0x006fff Peripheral Frame1 (PF1) (Data only) */
/* 0x007000 - 0x007fff Peripheral Frame2 (PF2) (Data only) */
/* 0x008000 - 0x008fff L0 SARAM (Prog and Data) */
/* 0x3d7800 - 0x3d7bff OTP (Prog and Data) */
/* 0x3d7c80 - 0x3d7cbf Device Cal (TI OTP) (Prog and Data) */
/* 0x3d7cc0 - 0x3d7cff Boot Get Mode (TI OTP) (Prog and Data) */
/* 0x3d7e80 - 0x3d7eb0 Calibration Data (Prog and Data) */
/* 0x3d7fff - 0x3d7fff PARTID value (Prog and Data) */
/* 0x3f0000 - 0x3f7fff FLASH (Prog and Data) */
/* 0x3f8000 - 0x3f8fff L0 SARAM Mirror (Prog and Data) */
/* 0x3fe000 - 0x3fffff BOOT ROM (Prog and Data) */
/********************************************************************/
menuitem "Initialize Memory Map";
hotmenu F28027_Memory_Map()
{
GEL_MapReset();
GEL_MapOn();
/* Program memory maps */
GEL_MapAdd(0x0,0,0x400,1,1); /* M0 SARAM */
GEL_MapAdd(0x400,0,0x400,1,1); /* M1 SARAM */
GEL_MapAdd(0xD00,0,0x100,1,1); /* PIEVECT(DSPBIOS)*/
GEL_MapAdd(0x8000,0,0x1000,1,1); /* L0 SARAM */
GEL_MapAdd(0x3d7800,0,0x400,1,0); /* OTP */
GEL_MapAdd(0x3d7c80,0,0x040,1,0); /* Device Cal */
GEL_MapAdd(0x3d7cc0,0,0x040,1,0); /* Boot Get Mode */
GEL_MapAdd(0x3d7e80,0,0x031,1,0); /* Calibration Data*/
GEL_MapAdd(0x3d7fff,0,0x001,1,0); /* PARTID value */
GEL_MapAdd(0x3f0000,0,0x8000,1,0); /* FLASH */
GEL_MapAdd(0x3f8000,0,0x1000,1,1); /* L0 SARAM Mirror */
GEL_MapAdd(0x3fe000,0,0x2000,1,0); /* BOOT ROM */
/* Data memory maps */
GEL_MapAdd(0x0,1,0x400,1,1); /* M0 SARAM */
GEL_MapAdd(0x400,1,0x400,1,1); /* M1 SARAM */
GEL_MapAdd(0x800,1,0x1800,1,1); /* PF0 */
GEL_MapAdd(0x6000,1,0x1000,1,1); /* PF1 */
GEL_MapAddStr(0x7000,1,0x1000,"R|W|AS2",0); /* PF2 */
GEL_MapAdd(0x8000,1,0x1000,1,1); /* L0 SARAM */
GEL_MapAdd(0x3d7800,1,0x400,1,0); /* OTP */
GEL_MapAdd(0x3d7c80,1,0x040,1,0); /* Device Cal */
GEL_MapAdd(0x3d7cc0,1,0x040,1,0); /* Boot Get Mode */
GEL_MapAdd(0x3d7e80,1,0x031,1,0); /* Calibration Data*/
GEL_MapAdd(0x3d7fff,1,0x001,1,0); /* PARTID value */
GEL_MapAdd(0x3f0000,1,0x8000,1,0); /* FLASH */
GEL_MapAdd(0x3f8000,1,0x1000,1,1); /* L0 SARAM Mirror */
GEL_MapAdd(0x3fe000,1,0x2000,1,0); /* BOOT ROM */
}
/********************************************************************/
/* The ESTOP0 fill functions are useful for debug. They fill the */
/* RAM with software breakpoints that will trap runaway code. */
/********************************************************************/
hotmenu Fill_F28027_RAM_with_ESTOP0()
{
GEL_MemoryFill(0x000000,1,0x000800,0x7625); /* Fill M0/M1 */
GEL_MemoryFill(0x008000,1,0x001000,0x7625); /* Fill L0 */
}
/********************************************************************/
/* TI OTP and USER OTP Memory Dump */
/********************************************************************/
menuitem "OTP Dump";
hotmenu OTP_Dump()
{
GEL_MemorySave(0x3d7800,1, 0x400, "USER_OTP_Bank.dat");
GEL_TextOut("\n**********************************************************************
\nUSER OTP Memory Dump Complete!
\nFile Output Directory: <CCS Install Directory>\\ccs<version>\\eclipse
\n (e.g. C:\\ti\\ccsv6\\eclipse)
\n**********************************************************************\n");
}
/********************************************************************/
menuitem "Watchdog";
hotmenu Disable_WD()
{
*0x7029 = *0x7029 | 0x0068; /* Set the WDDIS bit */
*0x7025 = 0x0055; /* Service the WD */
*0x7025 = 0x00AA; /* once to be safe. */
GEL_TextOut("\nWatchdog Timer Disabled");
}
/********************************************************************/
menuitem "Code Security Module"
hotmenu Unlock_CSM()
{
/* Perform dummy reads of the password locations */
XAR0 = *0x3F7FF8;
XAR0 = *0x3F7FF9;
XAR0 = *0x3F7FFA;
XAR0 = *0x3F7FFB;
XAR0 = *0x3F7FFC;
XAR0 = *0x3F7FFD;
XAR0 = *0x3F7FFE;
XAR0 = *0x3F7FFF;
/* Write passwords to the KEY registers. 0xFFFF's are dummy passwords.
User should replace them with the correct password for their DSP */
*0xAE0 = 0xFFFF;
*0xAE1 = 0xFFFF;
*0xAE2 = 0xFFFF;
*0xAE3 = 0xFFFF;
*0xAE4 = 0xFFFF;
*0xAE5 = 0xFFFF;
*0xAE6 = 0xFFFF;
*0xAE7 = 0xFFFF;
/* Clear XAR0 register of last value read */
XAR0 = 0x00000000;
}
/********************************************************************/
menuitem "Addressing Modes";
hotmenu C28x_Mode()
{
ST1 = ST1 & (~0x0100); /* AMODE = 0 */
ST1 = ST1 | 0x0200; /* OBJMODE = 1 */
}
hotmenu C24x_Mode()
{
ST1 = ST1 | 0x0100; /* AMODE = 1 */
ST1 = ST1 | 0x0200; /* OBJMODE = 1 */
}
hotmenu C27x_Mode()
{
ST1 = ST1 & (~0x0100); /* AMODE = 0 */
ST1 = ST1 & (~0x0200); /* OBJMODE = 0 */
}
/********************************************************************/
/* PLL Ratios */
/* */
/* The following table describes the PLL clocking ratios (0..10) */
/* */
/* Ratio CLKIN Description */
/* ----- -------------- ------------ */
/* 0 OSCCLK/2 PLL bypassed */
/* 1 (OSCCLK * 2)/2 10 Mhz for 10 Mhz CLKIN */
/* 2 (OSCCLK * 4)/2 20 Mhz for 10 Mhz CLKIN */
/* 3 (OSCCLK * 6)/2 30 Mhz for 10 Mhz CLKIN */
/* 4 (OSCCLK * 8)/2 40 Mhz for 10 Mhz CLKIN */
/* 5 (OSCCLK * 10)/2 50 Mhz for 10 Mhz CLKIN */
/* 6 (OSCCLK * 12)/2 60 Mhz for 10 Mhz CLKIN */
/********************************************************************/
menuitem "Set PLL Ratio";
hotmenu Bypass()
{
*0x7021 = 0; /* CLKIN = OSCCLK/1, PLL is bypassed */
DIVSEL_div1(); /* DIVSEL = 1/1 */
PLL_Wait();
}
hotmenu OSCCLK_x1_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 1; /* CLKIN = (OSCCLK * 1)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x2_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 2; /* CLKIN = (OSCCLK * 2)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x3_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 3; /* CLKIN = (OSCCLK * 3)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x4_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 4; /* CLKIN = (OSCCLK * 4)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x5_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 5; /* CLKIN = (OSCCLK * 5)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x6_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 6; /* CLKIN = (OSCCLK * 6)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x7_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 7; /* CLKIN = (OSCCLK * 7)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x8_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 8; /* CLKIN = (OSCCLK * 8)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x9_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 9; /* CLKIN = (OSCCLK * 9)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x10_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 10; /* CLKIN = (OSCCLK * 10)/2 */
PLL_Wait();
}
hotmenu OSCCLK_x12_divided_by_2()
{
DIVSEL_div2(); /* DIVSEL = 1/2 */
*0x7021 = 12; /* CLKIN = (OSCCLK * 12)/2 */
PLL_Wait();
}
// hotmenu OSCCLK_x1_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 1; /* CLKIN = (OSCCLK * 1)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x2_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 2; /* CLKIN = (OSCCLK * 2)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x3_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 3; /* CLKIN = (OSCCLK * 3)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x4_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 4; /* CLKIN = (OSCCLK * 4)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x5_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 5; /* CLKIN = (OSCCLK * 5)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x6_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 6; /* CLKIN = (OSCCLK * 6)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x7_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 7; /* CLKIN = (OSCCLK * 7)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x8_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 8; /* CLKIN = (OSCCLK * 8)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x9_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 9; /* CLKIN = (OSCCLK * 9)/1 */
// PLL_Wait();
// }
// hotmenu OSCCLK_x10_divided_by_1()
// {
// DIVSEL_div1(); /* DIVSEL = 1/1 */
// *0x7021 = 10; /* CLKIN = (OSCCLK * 10)/1 */
// PLL_Wait();
// }
//
/********************************************************************/
/* For F2802x devices, DIVSEL is 1/4 by default. Switch it to 1/2 */
/********************************************************************/
DIVSEL_div2()
{
int temp;
int PLLSTS;
PLLSTS = 0x7011;
temp = *PLLSTS;
temp &= 0xFE7F; /* Clear bits 7 & 8 */
temp |= 2 << 7; /* Set bit 8 */
*PLLSTS = temp; /* Switch to 1/2 */
}
/********************************************************************/
/* For F2802x devices, DIVSEL is 1/4 by default. Switch it to /1 */
/********************************************************************/
DIVSEL_div1()
{
int temp;
int PLLSTS;
PLLSTS = 0x7011;
DIVSEL_div2(); /* First switch DIVSEL to 1/2 and wait */
wait();
temp = *PLLSTS;
temp |= 3 << 7; /* Set bits 7 & 8 */
*PLLSTS = temp; /* Switch to 1/2 */
}
wait()
{
int delay = 0;
for (delay = 0; delay <= 5; delay ++)
{}
}
/********************************************************************/
/* For F2802x devices, check the PLLOCKS bit for PLL lock. */
/********************************************************************/
PLL_Wait()
{
int PLLSTS;
int delay = 0;
PLLSTS = 0x7011;
while ( ( (unsigned int)*PLLSTS & 0x0001) != 0x0001)
{
delay++;
GEL_TextOut("Waiting for PLL Lock, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
}
GEL_TextOut("\nPLL lock complete, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
}
/********************************************************************/
/* Clock Source Selection */
/********************************************************************/
menuitem "Clock Source Selection"
hotmenu IntOsc1_Sel()
{
*0x7012 &= ~0x0100; /* Turn on INTOSC1 */
*0x7012 &= ~0x0001; /* Switch to INTOSC1 */
}
hotmenu IntOsc2_Sel()
{
*0x7012 &= ~0x0400; /* Turn on INTOSC2 */
*0x7012 |= 0x0002; /* Switch OSCCLKSRC2 to INTOSC2 */
*0x7012 |= 0x0001; /* Switch OSCCLKSRC to INTOSC2 / External Clock */
}
hotmenu ExtOsc_Sel()
{
*0x7012 &= ~0x4000; /* Turn on XTALOSC */
*0x7012 &= ~0x2000; /* Turn on XCLKIN */
*0x7012 &= ~0x0002; /* Switch OSCCLKSRC2 to external clock */
*0x7012 |= 0x0001; /* Switch OSCCLKSRC to INTOSC2 / External Clock */
}
/********************************************************************/
/* Load the Device Calibration values from TI OTP */
/********************************************************************/
menuitem "Device Calibration"
hotmenu Device_Cal()
{
/* Perform dummy reads of the password locations */
XAR0 = *0x3F7FF8;
XAR0 = *0x3F7FF9;
XAR0 = *0x3F7FFA;
XAR0 = *0x3F7FFB;
XAR0 = *0x3F7FFC;
XAR0 = *0x3F7FFD;
XAR0 = *0x3F7FFE;
XAR0 = *0x3F7FFF;
/* If device is unlocked, run device calibration function in TI OTP
to copy calibrated values to ADC and internal oscillator registers */
if(((*0x0AEF) & 0x0001) == 0)
{
XAR0 = *0x701C;
*0x701C |= 0x0008;
*0x7014 = *0x3d7c83;
*0x7016 = *0x3d7c85;
*0x7140 = *0x3d7c8d;
*0x7141 = *0x3d7c8f;
if (*0x883 == 0x0000) /* Rev. 0 silicon */
{
*0x714E = *0x3d7c91;
}
else /* Rev. A and beyond silicon */
{
*0x714B = *0x3d7c91;
}
*0x701C = XAR0;
XAR0 = 0;
}
else
{
GEL_TextOut("\nDevice Calibration not complete, check if device is unlocked and recalibrate.");
}
}
/********************************************************************/
/* EMU Boot Mode - Set Boot Mode During Debug */
/********************************************************************/
menuitem "EMU Boot Mode Select"
hotmenu EMU_BOOT_SARAM()
{
*0xD00 = 0x55AA; /* EMU_KEY = 0x 55AA */
*0xD01 = 0x000A; /* Boot to SARAM */
}
hotmenu EMU_BOOT_FLASH()
{
*0xD00 = 0x55AA; /* EMU_KEY = 0x 55AA */
*0xD01 = 0x000B; /* Boot to FLASH */
}
/********************************************************************/
/*** End of file ***/
Thanks,
Jolly Jacob
