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CCS/TMS320F28377D: Loading Both CPUs

Christopher Willenborg
Prodigy 20 points
Part Number: TMS320F28377D


Tool/software: Code Composer Studio

    Hi. I am relatively new to Microcontrollers and I do not know what the steps are to debug/load both CPUs at the same time. I have read the TI datasheets, a lot of forum posts, and other website info, but I cannot seem to put it all together and figure it out. The end goal would be to do operations primarily and measurements on cpu1 and send them via spia (GPIO 16-19 setup in cpu1) to a master device to be displayed from cpu2. I have tried other methods of accomplishing this task, but have found little to moderate success along the way. My microcontroller will be the slave and receive a nonperiodic cs signal. I have done a lot of other spi modules and can get it to work in slave mode using interrupts with no problem, but the priority of interrupts was to low compared to the other operations I will be using to output reliable data. I figured I would try to put the spi communication on cpu2 because it has its own set of interrupts and I would also probably be able to operate it faster given the fact that I would be sharing the work between the two.

           Thanks

  • 0
    TI__Genius 17315 points
    Christopher,

    To learn more about dual-core loading/debugging, please see the following two workshops. In the F28379D multi-day workshop please see the lab exercise for module 11:

    processors.wiki.ti.com/.../C2000_Multi-Day_Workshop

    In the F28379D one-day workshop please see the lab exercise 1:

    processors.wiki.ti.com/.../C2000_One-Day_Workshop

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken
  • 0 in reply to Ken Schachter
    Prodigy 20 points

        Thank you Ken. The information you guided me to was very helpful. I have run into a new problem now however. There are no GpioCtrlRegs defined for cpu2, and I have no idea what all should be done for that. Both snippets of code that I am wanting to combine with both cpus need GpioCtrlRegs. (one being spi and another DAC/EPWM signals) If you could advise me as to what I should do to resolve this problem I would be very appreciative. I understand that I could probably define a GPIOCTRLREG for CPU2, but I also know that will be very difficult for me to establish at my current skill level. I have run both cpus without incident, but now I am stuck with this issue. I have done the blinky tutorial and DAC tutorial, but do not see a way around the GpioCtrlRegs. Thanks in advance for any help or advice.

                   ~Chris

  • 0 in reply to Christopher Willenborg
    TI__Genius 17315 points
    Chris,

    The F2837xD CPU1 acts as the master, and by default (after reset), CPU1 is responsible for all of the configuration and control. Using software running on CPU1 the common peripherals and GPIOs can be configured to be accessible by the CPU2 (and the configurations can be locked using the lock registers). The CPU selection is done by CPU1 using the CPU Selection Registers (CPUSELx). In the multi-day workshop manual please see slides on pages 5-5 (page 91) and 5-6 (page 92).

    Also, note that the GPIO Core Select Registers (e.g. GPACSELx) is used to selects which master's GPIODAT/SET/CLEAR/TOGGLE registers control the GPIO pin. In the workshop manual, please see the lower slide on page 5-14 (page 100). You can find an example using this in Lab 11, CPU1 Gpio.c file. In this file towards the bottom in the 'Select pin configurations' section you will notice the following three code lines:

    GpioCtrlRegs.GPACSEL4.bit.GPIO31 = 2; // GPIO31 is controlled by CPU2 (used in Lab 11)
    GpioCtrlRegs.GPADIR.bit.GPIO31 = 1; // GPIO31 is an output (used in Lab 11 - connected to LED)
    GpioDataRegs.GPASET.bit.GPIO31 = 1; // GPIO31 pin is set to 1 (used in Lab 11 - turn LED on)

    This pin is configured by CPU1 to be assigned to CPU2. Then in the CPU2 ISR code the pin is toggled (which is connected to the LED). Please note the Gpio.c only exists in the CPU1 project, but the pin is now assigned to and controlled by CPU2.

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken