Compiler/TMS320F28377D: Some questions about the SDFM module

jian li

Tool/software: TI C/C++ Compiler

1, Sinc clk is 10M, the decimation rate is 128, using SINC3 filter, the sampling period is how much time (the corresponding Sdfm1Regs.SDIFLG.all flag is set)?
2. In the motor control, which filter is beter used to sample the current? Sinc3 or sincfast;

thanks very much!

over 8 years ago

0 Manoj Santha Mohan over 8 years ago

TI__Guru 55700 points

Jian Li,

1) Data Acknowledge bit is set every time a new filter data is available. A new filter data is available every (DOSR / SD-Cx freq) secs. In your case, every (128/10MHz) = 128us.

2) This question can be best answered depending upon the ENOB requirement vs settling time tradeoff. Please check SD-modulator DS to get this information. For eg: AMC1304 (www.ti.com/.../amc1304l25.pdf), check Figure 53 and 55.

Regards,
Manoj

0 jian li over 8 years ago in reply to Manoj Santha Mohan

Intellectual 430 points

Thank Manoj Santha Mohan，
1）In my opinion, the time of the SINC3 filter should be 128*3*100ns=38.4us，128us delay is too long！

0 Manoj Santha Mohan over 8 years ago in reply to jian li

TI__Guru 55700 points

Jian Li,

Sorry, it was a typo in my earlier post. You will have new filter data every 12.8us when DOSR = 128 and SD-Cx freq = 10MHz.

Data rate of filter depends upon SD-Cx freq and DOSR and not on Filter type. What you have mentioned is latency of Sinc3 filter which is equal to order of filter x data rate of sinc filter. These details are mentioned clearly in TRM with example.

Regards,
Manoj

0 jian li over 8 years ago in reply to Manoj Santha Mohan

Intellectual 430 points

Thank Manoj Santha Mohan ，

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Compiler/TMS320F28377D: Some questions about the SDFM module