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TIDM-1000: Input Current Vienna PFC

Part Number: TIDM-1000
Other Parts Discussed in Thread: SFRA, CONTROLSUITE, POWERSUITE

Hello,

I am currently working with the Vienna Rectifier-Based, Three-Phased PFC and have been having some issues with the initial testing. I have been following the users guide and am currently following the steps for the INCR_BUILD 1: Open Loop (6.4.1). I am using a 3 Phase Delta supply as my power source so I have no neutral connection, I believe this is my issue. In the setup it says to connect the neutral to the DC mid point in the output bus, I cannot make this connection since I have no neutral from my supply. When I increase my input to 208 L-L my input current waveforms do not look like the ones shown in Figure 23, they look more like the ones shown in Figure 46. Figure 46 is from the INCR_BUILD 4 section where it instructs you to remove the neutral connection from the DC mid point on the output bus.

So my question is, since I don't have the neutral connection is that why my current waveforms look like Figure 46 instead of Figure 23? And is it possible to work through Build 1 to 3 without the connection?

Best Regards,

Luke

  • Luke,

    I debated how to document the steps to slowly buid up the system , the connection with neutral helps specially if it is a new board, you can decouple issues to just one leg of the three phase bridge etc. Hence we documented those steps.

    It will work without it as well through build level 1,2 and 3, but the behavior you will see may not match exactly to the UG as you have already seen.

    Specially when you want to run SFRA, the plots may be very different because of the fact there is coupling between the loops which is not accomodated in the software control design right now.

    Though in general it should work, and i have ran it like that multiple times.

    -Manish
  • Manish,

    Thank you for the response. I continued the with the steps, my current waveforms did look different but everything seemed to be working. I do have another question though, in the Build 3 section when I select the Closed Voltage and Current Loop option in the GUI it sets the Control Loop Design as the following;

    Tuning: Voltage Loop/GV

    Comp Number: 2

    Comp Style: PID

    Section 6.4.3.1 states the Style should be preset to PI. So when I open the compensation designer it does not match what is shown in Figure 37. I am currently just running the example project, not the solution adapter project option. Is this why? 

    Regards, 

    Luke

  • Can you provide what you are seeing ?

    Also can you tell me the version of the SDK and the version of the solution ? you can check this in the manifest of the SDK download ?

    My expectation is that it should match Fig 37.
  • My CCS is v8.1.0, my ControlSUITE is v3.4.9 and my GUI composer is fully updated. I've attached a word document with screenshots of the GUI. CCS-Screenshots.docx

  • Luke,

    Vienna rectifier design is now maintained in SDK, the controlSUITE version will no longer be maintained, hence if you are getting started i will higly recommend the www.ti.com/.../C2000WARE-DIGITALPOWER-SDK

    This is probaly the reason the screenshot don't match, the UG is upated to the SDK project.

    The new release in SDK uses driver library and new C2000 power lib modules.

    We released this in July so i can understand the confusion.

    -Manish
  • Also, i saw you are using CCSv8 which is great, but the powerSUITE projects do have an issue that will be fixed soon. Likely in the coming update of CCS. If you want you can download CCSv7.4 for a better experience.