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TMS320F28335: F28335: Question regarding eCAN - CANRFP

Part Number: TMS320F28335

At pag 34 of SPRUEU1, at (2.9) is said that  "If a remote frame is stored in a receive mailbox, the RFPn bit will not be set."

But at Table 2-9 (CANRFP Field descriptions) is said: "For a receive mailbox, RFPn is set if a remote frame is received and TRSn is not affected."

For me, the statements are contradictory...


Could someone explain me, please?

  • The line "If a remote frame is stored in a receive mailbox (AAM=0, CANMD=1), the RFPn bit will not be set" appears to be in error. I am able to see the RFP bit getting set in a Receive mailbox. The following should be the behavior:

    Whenever a remote frame request is received by the CAN module, the
    corresponding bit RFP[n] in the remote frame pending register is set. If a
    remote frame is stored in a receive mailbox (AAM=0, MD=1), the CPU has to
    initiate the reply frame transmission and has to reset the RFP[n] flag. If a
    mailbox configured in auto-answer mode (AAM=1, MD=0) receives a remote
    frame, the CAN module clears the RFP[n] flag after the reply frame has been
    successfully transmitted.

    Please let me know if I can be of further help.

  • Thank you very much

    Just another small question:

    -> The RFP[n]  cleaning process by the CPU.

    The text says: "(...) the CPU has to clear the RFP[n] flag and the TRS[n] bit by setting the corresponding transmission request reset bit TRR[n]."

    So I understood that if the mailbox is a send mailbox with AAM = 1, to manually interrupt the replying and clear RFP & TRS bits, the CPU has only to set TRR...

    But  if the mailbox is a receive mailbox and a remote frame is received, the TRS wont be set automatically.

    So  I'm considering that I have to clear RFP[n] directly, not by setting TRR... yes? And to clear RFP directly i need to write 1 to it?

  • You should be able to clear the RFP bit by writing to it.