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TMS320F28377D: I have one question about using the On-Chip ADC module of TMS320F28377D.

Part Number: TMS320F28377D

Hi,

I am using the TMS320F28377D chip.

I have one question about using the On-Chip ADC module.

If I set codes the following for SOC0 and SOC1, I wonder if the time from SOC Flag to the completion of conversion of both channels and recording the value in the result register is calculated as follows.

[SYSCLK Frequecy]

- 200MHz

[SOC0 Setting]

- ADC Clock = 50MHz (ADCCTL2[PRESCALE] = 6)

- Acquisition Window : 15 SYSCLK

- Trigger Source : EPWM1 SOCA

[SOC1 Setting]

- ADC Clock = 50MHz (ADCCTL2[PRESCALE] = 6)

- Acquisition Window : 15 SYSCLK

- Trigger Source : EPWM1 SOCA

[Calculated time from SOC flag to recording the results]

SOC0 : tSH + tEOC = 15 + 41 SYSCLK = 280nsec

SOC1 : tSH + tLAT = 15 + 44 SYSCLK = 295nsec

SOC0 and SOC1 : 280nsec + 295nsec = 575nsec

I wonder if I calculated it correctly.

Thanks in advance.

  • Hi  Sang-il,

    Calculations should be based on tLAT (for when the ADCRESULT registers are updated) for both SOCs.  Also, I think you do not have the latest copy of the TRM.  Document SPRUHM8G has the latest ADC timing table as below (some corrections made on the # of SYSCLK cycles):

    Then your calculations will be:

    SOC0, SOC1: tSH + tLAT = 15 + 43 SYSCLK = 290ns

    SOC0 and SOC1: 290ns + 290 ns =  580ns

    Best regards,

    Joseph

  • I have referred to the chip's data sheet (SPRS880J).

    Perhaps the contents of the data sheet have not yet been updated.

    The reason I think so for the case below is because of the red square box in the attached image.

    This is an example showing that SOC0 and SOC1 are triggered from the same source. (SPRUHM8G)

    After tEOC of SOC0, the S / H pulse of SOC1 appears.

    So, I thought that the time it takes to write all the conversion results of SOC0 and SOC1 into the ADCRESULT register is SOC0 (tSH + tEOC) + SOC1 (tSH + tLAT).

    Maybe I'm thinking of this the wrong way.

    Is it right calculation that you talked or I am right?

  • Hi Sang-il,

    tEOC is just a flag that indicates that the ADC has finished converting. You want to refer to tLAT (late interrupt) to ensure that the conversion data is available in the ADCRESULT register. Although both SOCs are triggered by the same source, SOC0 gets the priority to complete first before SOC1.

    - SOC0 result is available after tSH+tLAT
    - SOC1 result is available after SOC0 completes which is tSH + tLAT and another tSH + tLAT for SOC1

    Hope above clarifies the calculation.

    Best regards,
    Joseph