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CCS/TMS320F280049C: Flash Entry point changes for bootloader

amol dhumal
Intellectual 360 points

Part Number: TMS320F280049C
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Hi all,

For TMS320F280049C bootloader development purpose. What changes needs to be done in application linker file and bootloader linker file w.r.t. to entry address?

  • 0
    TI__Mastermind 30255 points
    Hello

    Can you please clarify your question. Typically, the bootloader code would be placed at the flash boot entry address so you'd boot to the bootloader and determine whether you want to use it or not. The app can be linked to wherever makes sense for your design.
    The SCI flash kernel example is typically good example for bootloader code in C2000Ware.

    Best regards
    Chris
  • 0 in reply to Christopher Chiarella
    Intellectual 360 points

    I have made some changes in linker file

    Here is  boot-loader code linker file

    MEMORY
    {
    PAGE 0 :
    /* BEGIN is used for the "boot to Flash" bootloader mode */

    BEGIN : origin = 0x080000, length = 0x000002
    RAMM0 : origin = 0x0000F5, length = 0x00030B

    RAMLS0 : origin = 0x008000, length = 0x000800
    RAMLS1 : origin = 0x008800, length = 0x000800
    RAMLS2 : origin = 0x009000, length = 0x000800
    RAMLS3 : origin = 0x009800, length = 0x000800
    RAMLS4 : origin = 0x00A000, length = 0x000800
    RESET : origin = 0x3FFFC0, length = 0x000002

    /* Flash sectors */
    /* BANK 0 */
    FLASH_BANK0_SEC0 : origin = 0x080002, length = 0x000FFE /* on-chip Flash */
    FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* on-chip Flash */

    /* BANK 1 */
    FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* on-chip Flash */

    PAGE 1 :

    BOOT_RSVD : origin = 0x000002, length = 0x0000F3 /* Part of M0, BOOT rom will use this for stack */
    RAMM1 : origin = 0x000400, length = 0x000360 /* on-chip RAM block M1 */
    FLASH_API_ROM_RSVD : origin = 0x760, length = 0x000020 /* Required by Flash API from ROM */

    RAMLS5 : origin = 0x00A800, length = 0x000800
    RAMLS5_6 : origin = 0x00B000, length = 0x001000
    // RAMLS7 : origin = 0x00B800, length = 0x000800

    RAMGS0 : origin = 0x00C000, length = 0x002000
    RAMGS1 : origin = 0x00E000, length = 0x002000
    RAMGS2 : origin = 0x010000, length = 0x002000
    RAMGS3 : origin = 0x012000, length = 0x002000
    }


    SECTIONS
    {

    codestart : > BEGIN, PAGE = 0, ALIGN(4)
    .text : >> FLASH_BANK0_SEC0 | FLASH_BANK0_SEC1 | FLASH_BANK0_SEC2, PAGE = 0, ALIGN(4)
    .cinit : > FLASH_BANK0_SEC0, PAGE = 0, ALIGN(4)
    .pinit : > FLASH_BANK0_SEC0, PAGE = 0, ALIGN(4)
    .switch : > FLASH_BANK0_SEC0, PAGE = 0, ALIGN(4)
    .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

    .cio : > RAMLS0, PAGE = 0
    .stack : > RAMM1, PAGE = 1
    .ebss : > RAMLS5_6, PAGE = 1
    .esysmem : > RAMLS5_6, PAGE = 1
    .econst : > FLASH_BANK0_SEC0, PAGE = 0, ALIGN(4)

    ramgs0 : > RAMGS0, PAGE = 1
    ramgs1 : > RAMGS1, PAGE = 1
    /*
    GROUP
    {
    .TI.ramfunc
    } LOAD = FLASH_BANK0_SEC0,
    RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    RUN_SIZE(_RamfuncsRunSize),
    RUN_END(_RamfuncsRunEnd),
    PAGE = 0, ALIGN(4)

    */

    .TI.ramfunc : LOAD = FLASH_BANK0_SEC0,
    RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),


    PAGE = 0, ALIGN(4)
    }

    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */

      

    and here is my application code linker file


    MEMORY
    {
    PAGE 0 :
    /* BEGIN is used for the "boot to Flash" bootloader mode */

    BEGIN : origin = 0x088000, length = 0x000002
    RAMM0 : origin = 0x0000F5, length = 0x00030B

    RAMLS0 : origin = 0x008000, length = 0x000800
    RAMLS1 : origin = 0x008800, length = 0x000800
    RAMLS2 : origin = 0x009000, length = 0x000800
    RAMLS3 : origin = 0x009800, length = 0x000800
    RAMLS4 : origin = 0x00A000, length = 0x000800
    RESET : origin = 0x3FFFC0, length = 0x000002

    /* Flash sectors */
    /* BANK 0 */
    FLASH_BANK0_SEC0 : origin = 0x080000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */

    FLASH_BANK0_SEC8 : origin = 0x088002, length = 0x000FFE /* on-chip Flash */
    FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* on-chip Flash */

    /* BANK 1 */
    FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* on-chip Flash */

    PAGE 1 :

    BOOT_RSVD : origin = 0x000002, length = 0x0000F3 /* Part of M0, BOOT rom will use this for stack */
    RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */

    RAMLS5 : origin = 0x00A800, length = 0x000800
    RAMLS6 : origin = 0x00B000, length = 0x000800
    RAMLS7 : origin = 0x00B800, length = 0x000800

    RAMGS0 : origin = 0x00C000, length = 0x002000
    RAMGS1 : origin = 0x00E000, length = 0x002000
    RAMGS2 : origin = 0x010000, length = 0x002000
    RAMGS3 : origin = 0x012000, length = 0x002000
    }


    SECTIONS
    {
    codestart : > BEGIN, PAGE = 0, ALIGN(4)
    .text : >>FLASH_BANK0_SEC9 | FLASH_BANK0_SEC10 | FLASH_BANK0_SEC11, PAGE = 0, ALIGN(4)
    .cinit : > FLASH_BANK0_SEC9, PAGE = 0, ALIGN(4)
    .pinit : > FLASH_BANK0_SEC9, PAGE = 0, ALIGN(4)
    .switch : > FLASH_BANK0_SEC9, PAGE = 0, ALIGN(4)
    .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

    .cio : > RAMLS0, PAGE = 0
    .stack : > RAMM1, PAGE = 1
    .ebss : > RAMLS5, PAGE = 1
    .esysmem : > RAMLS5, PAGE = 1
    .econst : > FLASH_BANK0_SEC9, PAGE = 0, ALIGN(4)

    ramgs0 : > RAMGS0, PAGE = 1
    ramgs1 : > RAMGS1, PAGE = 1

    .TI.ramfunc : LOAD = FLASH_BANK0_SEC9,
    RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    RUN_SIZE(_RamfuncsRunSize),
    RUN_END(_RamfuncsRunEnd),
    PAGE = 0, ALIGN(4)

    }

    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */

    Is these changes are correct or do I need to more changes?

  • 0 in reply to amol dhumal
    TI__Mastermind 30255 points
    Hello

    Yes, those look correct.

    Best regards
    Chris