F2812 L0/L1 status

Ricky Zhang said:

Hi, Champs,

When a system with F2812 is running normally in emulator mode, we configure it go to SCI boot mode, and disconnect the CCS and target chip, then connect them again, it will issue a reset. If we set a hardware breakpoint in c_init00, the code will stop here when we connect them again, then what's the status of L0/L1 now? I mean will the values in them keep the ones before disconnecting, or all being set to 0?

 

Best regards,

Ricky Zhang

Ricky,

RAM is not cleared by simply connecting or disconnecting the emulator.  The Boot ROM uses some RAM for stack - on 281x if I recall this is in M0 - so this can change if you run through the boot ROM again.  

Note that memory protected by the CSM will read back zero after a reset until the password locations are read (if password is erased) or the match flow is performed (password programmed).

-Lori