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TMS320F28069: EPWM force trigger enable but ISR didn't execute

Part Number: TMS320F28069


Hi Champs,

I wanted to use sw to trigger PWM interrupt base on countrolSUITE example code (Example_2806xEPwmDeadBand).

I wrote EPWM1.ETFRC.bit = 1 in main loop and set up break point in epwm1_isr. I wished code will stop at epwm1_isr break point. However, it didn't stop at break point. I checked EPWM1 register which ETFLG -> INT =1 but i checked PIEIFR3.INTx1 = 0. I think this is why epwm1_isr didn't execute. After i set PIEIFR3.INTx1 = 1, epwm1_isr can be executed. Could you please tell me why EPWM1 ETFLG interrupt flag set to 1 but IFR flag still be 0 ? I thought IFR is latch and should latch ETFLG status automatically. Should i enable register setting ? I inserted pwm1 setting and piectrl register in post. thanks for your reply in advance. 

   for(;;)
   {
       EPwm1Regs.ETFRC.bit.INT = 1;
       PieCtrlRegs.PIEIFR3.bit.INTx1 = 1;
      __asm("          NOP");
   }


// Enable CPU INT3 which is connected to EPWM1-3 INT:
   IER |= M_INT3;

// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
   PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
   PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
   PieCtrlRegs.PIEIER3.bit.INTx3 = 1;

   
   // Interrupt where we will change the Deadband
   EPwm1Regs.ETSEL.bit.INTSEL =0;// ET_CTR_ZERO;     // Select INT on Zero event
   EPwm1Regs.ETSEL.bit.INTEN = 1;                // Enable INT
   EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;           // Generate INT on 3rd event