TMS320F28379D: LTC2348-18 SPI Communication

Part Number: TMS320F28379D

In order to read all 8 channels of the LTC2348-18 ADC over SPI, 8x24 bits must be transmitted.  I figured 12 bit data words would evenly split the most and least significant parts of the 24 bits of data for each channel.  With a total bit count of 8*24 = 192 and splitting this into 12 bit data words (192 / 12), that requires 16 spots in the SPI FIFO, which it has. 

Here's my configuration code.

//
// Function to configure SPI A in FIFO mode.
//
void initSPI()
{


    //
        // GPIO59 is the SPISOMIA.
        //
        GPIO_setMasterCore(59, GPIO_CORE_CPU1);
        GPIO_setPinConfig(GPIO_59_SPISOMIA);
        GPIO_setPadConfig(59, GPIO_PIN_TYPE_PULLUP);
        GPIO_setQualificationMode(59, GPIO_QUAL_ASYNC);

        //
        // GPIO58 is the SPISIMOA clock pin.
        //
        GPIO_setMasterCore(58, GPIO_CORE_CPU1);
        GPIO_setPinConfig(GPIO_58_SPISIMOA);
        GPIO_setPadConfig(58, GPIO_PIN_TYPE_PULLUP);
        GPIO_setQualificationMode(58, GPIO_QUAL_ASYNC);

        //
        // GPIO61 is the SPISTEA.
        //
        GPIO_setMasterCore(61, GPIO_CORE_CPU1);
        GPIO_setPinConfig(GPIO_61_SPISTEA);
        GPIO_setPadConfig(61, GPIO_PIN_TYPE_PULLUP);
        GPIO_setQualificationMode(61, GPIO_QUAL_ASYNC);

        //
        // GPIO60 is the SPICLKA.
        //
        GPIO_setMasterCore(60, GPIO_CORE_CPU1);
        GPIO_setPinConfig(GPIO_60_SPICLKA);
        GPIO_setPadConfig(60, GPIO_PIN_TYPE_PULLUP);
        GPIO_setQualificationMode(60, GPIO_QUAL_ASYNC);


    //
    // Must put SPI into reset before configuring it
    //
    SPI_disableModule(SPIA_BASE);

    //
    // SPI configuration. Use a 500 kHz SPICLK and 12-bit word size.
    //
    SPI_setConfig(SPIA_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA0,
                  SPI_MODE_MASTER, 500000, 12);
    SPI_disableLoopback(SPIA_BASE);
    SPI_setEmulationMode(SPIA_BASE, SPI_EMULATION_FREE_RUN);

    SPI_enableFIFO(SPIA_BASE);
    SPI_clearInterruptStatus(SPIA_BASE, SPI_INT_TXFF);
    SPI_setFIFOInterruptLevel(SPIA_BASE, SPI_FIFO_TX16, SPI_FIFO_RX16);
    SPI_enableInterrupt(SPIA_BASE, SPI_INT_TXFF | SPI_INT_RXFF );

    //
    // Configuration complete. Enable the module.
    //
    SPI_enableModule(SPIA_BASE);


}

And here is how I'm doing the transfer.  ARRAY_SIZE is defined as 16.

uint16_t i = 0, j = 0;
    uint32_t hi, lo;
    while(1)
    {
        // Transmit data
        for (i = 0; i < ARRAY_SIZE; i++)
        {
            SPI_writeDataBlockingFIFO(SPIA_BASE, 0xFFFF);
//            rData[i] = SPI_readDataBlockingFIFO(SPIA_BASE) & 0x0FFF;
        }

        // Block until data is received and then return it

        for (i = 0; i < ARRAY_SIZE; i++)
        {
            rData[i] = SPI_readDataBlockingFIFO(SPIA_BASE) & 0x0FFF;
        }


        for(i = 0, j = 0; i < (ARRAY_SIZE / 2); i++)
            {


                hi = (uint32_t) rData[j++];
                lo = (uint32_t) rData[j++];

                hi = hi << 12;
                lo = (lo & 0x0FFF);


                rawData[i] = (uint32_t) (hi | lo);

            }

        for (i = 0; i < ARRAY_SIZE / 2; i++)
        {
            values[i] = ((int32_t) ((rawData[i] >> 6) << 14)) >> 14;


        }



    }

Is this the proper way to handle reading 192 bits at a time?

Thanks!