CCS/TMS320F28032: A question about the time about TBCTR

Hi Erwin,

Can you please give more details about the question? When the sync in signal is received timer counter is loaded with tbphs value and the counter starts counting from there. Are you asking about the time between the syncin signal & and the loading of timer ctr register with the tbphs value?

Thanks

Vasudha

Hi Erwin,

As per TRM, The value of the phase register is loaded into the counter register when an input synchronization pulse is detected (TBPHS → TBCTR). This operation occurs on the next valid time-base clock (TBCLK) edge. I think the max delay would be 1 TBCLK.

Thanks

Vasudha

Is the time fixable when switch frequency changes?

What do you mean by switch frequency here ?

Thanks

Vasudha