TMS320F28335: ADC EOS timming detection method

user5821586

Prodigy 130 points

Part Number: TMS320F28335

I would like to konw correct method of end of conversion (EOS) timming.

Is SER_CNTR: chage to 0 correct?

Or is INT_SEQ: chnage to 0 correct?

back ground: we use SER_CNTR to detect EOC timming, but can't detect correct timming.

over 7 years ago

0 tlee over 7 years ago

TI__Guru 62975 points

user5821586,

The recommended method is to enable INT_SEQn and look for the bit to be SET.

You can see the bit definitions in the F2833x ADC Reference Guide.

-Tommy

0 MatthewPate over 7 years ago in reply to tlee

TI__Guru* 81800 points

Just to add to Tommy's reply(since we have another thread that is related to this one, INT_SEQx is inclusive of the result latching in the result register(which is not the same as the conversion time).

The last conversion's result in the ADCRESULT registers is guaranteed to be valid when the INT_SEQx bit is high. As the flow chart indicates the other bits, SEQ_CNTR/SEQ_BSY are intermediary indicators.

Best,
Matthew

0 user5821586 over 7 years ago in reply to tlee

Prodigy 130 points

Tommy
Thank you!
I understand.

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TMS320F28335: ADC EOS timming detection method