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TMS320F28027: TMS320 Bandgap Reference

Part Number: TMS320F28027

I have checked couple of threads about internal bandgap reference in TMS320F28027F.

Still not understanding how reference voltage could go above supply voltage.

Is there some (proprietary) voltage booster circuit on chip?

I was investing in good 3.3V LDO assuming it is used as ADC reference. It seems like waste of money (if above is true).

  • Darko,

    I am not sure that I fully understand your query. The ADC reference can be configured to use either a) the internal bandgap reference or b) an externally supplied voltage.

    The internal bandgap reference will not exceed the supply voltage. Discussions of VREFHI > VDDA are typically appropriate when the ADC is configured for external reference mode.

    If you look at the datasheet specs for ADC performance, you will see different values for gain error depending on the reference mode. The improvement in gain error when using external reference mode is largely due to the fact that the internal reference gain error includes the error contributed by the internal bandgap reference, but the external reference gain error assumes a perfect external voltage.

    However, when using the external gain mode, it should be possible to perform on-board trimming to improve the gain error: e2e.ti.com/.../232838

    -Tommy
  • Tommy,

    In our design we are using internal voltage reference with no option to use external. I wrongly assumed (possibly due to lack of relevant info in datasheets) the Vdda is used as internal reference like, in many general purpose micros.

    Just few days ago we realized there is indeed internal Vref. After inquiry tread below was forwarded by FAI.

    https://e2e.ti.com/support/microcontrollers/f/171/t/691399

    The whole thread indicates that bandgap reference is somehow at 3.3V (+/- ??) even if Vdda is below 3.3V.

    Darko

  • Darko,

    The way that I would think about it is that the internal bandgap reference is set to a voltage that is less than VDDA (let's say 1.65V as an example), and the ADC takes proper steps to internally scale the input voltage so that the effective FSR is 3.3V. This way, the ADC can maintain a 3.3V FSR even if VDDA is below 3.3V.

    -Tommy
  • Thanks Tommy,

    Input scaling is the only thing that makes sense. I wish data sheets are more explicit and have more data on reference performance.

    Darko