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TMS320F28375D: NMI Watchdog Counter behavior

Kuerbis
Expert 4145 points

Part Number: TMS320F28375D

Hi Team,

 

Would you please teach me more detail of NMI Watchdog Counter behavior?

I read TRM but am not sure how to behave NMI Watchdog Counter after clear the flag bit using the NMIFLGCLR register to prevent an NMI watchdog reset (NMIWDRS).

Is it still incremented? Is it reset to zero and wait future NMI?

I would like to know it at the following situation.

  1. Still In current ISR of NMI. And there is pending NMIs

  2. Still In current ISR of NMI. And there is no pending NMIs

 

2.5.1 and Table 2-65 is described in TMS320F2837xD Dual-Core Delfino Microcontrollers TRM (SPRUHM8G)


 

Thanks and Best regards,

Kuerbis

  • 0
    TI__Genius 10345 points
    hi ,

    As per the table 2-65, If no enabled NMI FAIL flag is set, then the counter will reset to zero and remain at zero until an enabled NMI FAIL flag is set.
    So, Once we clear the flag bit using the NMIFLGCLR, it would clear the flag and the counter will reset to zero and not increment , so no NMIWDRS would occur.

    Still In current ISR of NMI. And there is pending NMIs. -> it will continue to increment till the pending NMI flag is cleared.

    Still In current ISR of NMI. And there is no pending NMIs.-> the counter will reset to zero and not increment

    Regards.
  • 0 in reply to MEGHANA MANAVAZHI
    TI__Expert 4145 points
    Hi MEGHANA

    Thanks!

    Thanks and Best regards,
    Kuerbis