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RTOS/TMS320F28379D: TMS320F28379D dual core debugging (CPU1 with RTOS)

Sabina Greenberg101872
Expert 2780 points

Part Number: TMS320F28379D

Tool/software: TI-RTOS

Dear support,

We build SW CPU1(communication, some logic...) with RTOS, and SW CPU2 without RTOS (has 10 usec timer interrupt that read/write data via SPi-A and SPi-B).

We verified algorithm in standalone application from SW CPU1 and with CPU1 timer interrupt 100usec. Now all SPI Read/Write commands we want to move to CPU2(we have to do it very quickly - each 10 usec)

I have problem with debug application from dual core.

I run SW from CCS 8.1 with the following order.

1. Reset both CPUs and load SW CPU1(without run) and SW CPU2(without run)

2. SW CPU1 after downloading is waiting on Boot_bootCPU2() function (running)

3. After SW CPU2 running - SW CPU1 is still waiting. IpcRegs_IPCBOOTSTS = 0.

Only after board turn OFF/ON I see that leds blink(SW CPU1 & SW CPU2 do something...). But I can not debug the program.

What is configure should be for dual core debugging? Is it possible to do SW CPU1 with RTOS and SW CPU2 - without RTOS?

Thanks,Sabina

   

CCS/TMS320F28379D: Problems in dual-core programming at CCS 8.0

  • 0
    TI__Guru 54875 points
    IPCBOOTSTS is set by the CPU2 boot ROM, so you need to start CPU2 in a way that allows boot ROM to run. After you load CPU2, do a reset and run. Don't do a CCS restart which will take you to main() without running the boot ROM.

    Whitney
  • 0 in reply to Whitney Dewey
    Expert 2780 points

    Hi,

    It is no so clear how to do it "to start CPU2 in a way that allows boot ROM to run"

    and "After you load CPU2, do a reset and run"

    For problem fix I do the following:
    1. Load SW CPU2 (breakpoint stop on main)
    2. Load SW CPU1(breakpoint stop on main)
    3. Run CPU2
    4.Run CPU1

    I can debug now, but I see very strange behaviors. Timer & Clock in both CPUs work much slowly in Debug then without Debug.

    Why timing is changed in dual core debugging? With one core SW work with the same timing with/without debug.

    Thanks,Sabina

     

  • 0 in reply to Sabina Greenberg101872
    TI__Guru 54875 points
    I meant after you load CPU2 and it's stopped at main(), hit the CPU reset button in CCS to set the PC to the boot ROM start and run from there instead of main().

    You shouldn't be seeing a difference in the clock speeds. Sounds like for some reason the PLL isn't being configured properly by CPU1 when you're running from debug. If you step through the code on CPU can you see the clock being configured correctly? Or if it's getting stuck somewhere before it can be configured?

    Whitney