Part Number: TMS320F28379D
Tool/software: Code Composer Studio
Hello Community,
I want to observe the reaction of the SDFM comparator unit and of the SDFM data-filter unit with different OSR parameters on an oscilloscope. Therefore I take the data out of the SDFM data-filter unit and give it out over an DAC. Now I want a single GPIO to set high at the moment when the measured data is over the limit of HLT or LLT.
I tried to do this in the the ISR of the SDFM and by reading the flagregister I want to decide what action is to take. In this way the dataoutput to the DAC works fine, but I don´t get these single GPIO to rise.
Can annybody please help and show me where my mistakes are?
Thanks and regards
Basti
//########################################################################### // // FILE: sdfm_pwm_sync_cpu_cpu01.c // // TITLE: SDFM PWM sync Example for F2837xD. // //! \addtogroup cpu01_example_list //! <h1> SDFM PWM Sync </h1> //! //! In this example, SDFM filter data is read by CPU in SDFM ISR routine. The //! SDFM configuration is shown below: //! - SDFM1 is used in this example //! - MODE0 Input control mode selected //! - Comparator settings //! - Sinc3 filter selected //! - OSR = 32 //! - HLT = 0x7FFF (Higher threshold setting) //! - LLT = 0x0000(Lower threshold setting) //! - Data filter settings //! - All the 4 filter modules enabled //! - Sinc3 filter selected //! - OSR = 256 //! - All the 4 filters are synchronized by using PWM //! (Master Filter enable bit) //! - Filter output represented in 16 bit format //! - In order to convert 25 bit Data filter //! into 16 bit format user needs to right shift by 9 bits for //! Sinc3 filter with OSR = 256 //! - Interrupt module settings for SDFM filter //! - All the 4 higher threshold comparator interrupts disabled //! - All the 4 lower threshold comparator interrupts disabled //! - All the 4 modulator failure interrupts disabled //! - All the 4 filter will generate interrupt when a new filter data //! is available //! // //########################################################################### // $TI Release: F2837xD Support Library v210 $ // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $ // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated - // http://www.ti.com/ ALL RIGHTS RESERVED $ //########################################################################### // // Included Files // #include "F28x_Project.h" #include "F2837xD_struct.h" #include "F2837xD_sdfm_drivers.h" // // Defines // #define MAX_SAMPLES 200 #define SDFM_PIN_MUX_OPTION1 1 #define SDFM_PIN_MUX_OPTION2 2 #define SDFM_PIN_MUX_OPTION3 3 #define EPWM_TIMER_TBPRD 65535 //32768//65535 // ePWM Period register /////////////////////////////////////////////////////////////////////////////// //Define für ePWM #define DB_UP 1 //Define für DAC #define REFERENCE_VDAC 0 #define REFERENCE_VREF 1 #define DACA 1 #define DACB 2 #define DACC 3 #define REFERENCE REFERENCE_VREF #define DAC_NUM DACA //Define für ADC #define RESULTS_BUFFER_SIZE 3072 ////////////////////////////////////////////////////////////////////////////// // // Globals // uint16_t gPeripheralNumber, gPWM_number = 11; uint16_t Filter1_Result[MAX_SAMPLES]; uint16_t Filter3_Result[MAX_SAMPLES]; uint16_t Filter2_Result[MAX_SAMPLES]; uint16_t Filter4_Result[MAX_SAMPLES]; ////////////////////////////////////////////////////// //Globals für ePWM Uint16 EPwm5_DB_Direction; Uint32 EPwm5TZIntCount; //Glaobals für DAC volatile struct DAC_REGS* DAC_PTR[4] = {0x0,&DacaRegs,&DacbRegs,&DaccRegs}; //Globals für ADC Uint16 AdcaResults[RESULTS_BUFFER_SIZE]; Uint16 resultsIndex; volatile Uint16 bufferFull; ///////////////////////////////////////////////////// #pragma DATA_SECTION(Filter1_Result,"Filter1_RegsFile"); #pragma DATA_SECTION(Filter2_Result,"Filter2_RegsFile"); #pragma DATA_SECTION(Filter3_Result,"Filter3_RegsFile"); #pragma DATA_SECTION(Filter4_Result,"Filter4_RegsFile"); // // Function Prototypes // void Sdfm_configurePins(uint16_t); void InitEPwm(void); void done(void); __interrupt void Sdfm1_ISR(void); /////////////////////////////////////////////////////// //Function Prototypes für ePWM void InitEPwm5Example(); __interrupt void epwm5_isr(void); void InitEPwmGpio_TZ(void); //Function Prototypes für DAC void configureDAC(Uint16 dac_num); //Function Prototypes für ADC void ConfigureADC(void); void ConfigureEPWM(void); void SetupADCEpwm(Uint16 channel); void SetupADCEpwm3(Uint16 channel); //interrupt void adca1_isr(void); /////////////////////////////////////////////////////// // // Main // void main(void) { uint16_t pinMuxoption; uint16_t HLT, LLT; // // Initialize System Control: // PLL, WatchDog, enable Peripheral Clocks // This example function is found in the F2837xD_SysCtrl.c file. // InitSysCtrl(); ///////////////////////////////////////////////// InitGpio(); // Einschalten der CLKs der PWM-Module // CpuSysRegs.PCLKCR2.bit.EPWM5=1; InitEPwmGpio_TZ(); ///////////////////////////////////////////////// // // Clear all __interrupts and initialize PIE vector table: // Disable CPU __interrupts // DINT; // // Initialize PIE control registers to their default state. // The default state is all PIE __interrupts disabled and flags // are cleared. // This function is found in the F2837xD_PieCtrl.c file. // InitPieCtrl(); // // Disable CPU __interrupts and clear all CPU __interrupt flags: // IER = 0x0000; IFR = 0x0000; // // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // This will populate the entire table, even if the __interrupt // is not used in this example. This is useful for debug purposes. // The shell ISR routines are found in F2837xD_SysCtrl.c. // This function is found in F2837xD_SysCtrl.c. // InitPieVectTable(); // // Interrupts that are used in this example are re-mapped to // ISR functions found within this file. // EALLOW; PieVectTable.SD1_INT = &Sdfm1_ISR; ///////////////////////////////////////////// //Interrupt-Funktionen für ADC //PieVectTable.ADCA1_INT = &adca1_isr; //Interrupt-Funktionen für EPWMs PieVectTable.EPWM5_TZ_INT = &epwm5_isr; //////////////////////////////////////////// EDIS; ///////////////////////////////////////////////////////// // Configure the ADC and power it up // ConfigureADC(); ///////////////////////////////////////////////////////// EALLOW; ///////////////////////////////////////////////////////// // Alles zwischen den ******* wird synchron ausgeführt durch die Sync Befehle EALLOW; CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0; EDIS; //Intitialisierung/Einstellung der EPWM2 und der EPWM7 InitEPwm5Example(); //Intitialisierung/Einstellung ADC ePWM ConfigureEPWM(); EALLOW; CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1; EDIS; ///////////////////////////////////////////////////////// ///////////////////////////////////////////////////////// // Setup the ADC for ePWM triggered conversions on channel 0 //SetupADCEpwm(0); //Änderung aufu Channel 2 SetupADCEpwm(2); SetupADCEpwm3(3); ///////////////////////////////////////////////////////// // // Enable CPU INT5 which is connected to SDFM INT // IER |= M_INT5; ///////////////////////////////////////////////////////// // Enable global Interrupts and higher priority real-time debug events: // IER |= M_INT1; //Enable group 1 interrupts EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM ///////////////////////////////////////////////////////// // // Enable SDFM INTn in the PIE: Group 5 __interrupt 9-10 // PieCtrlRegs.PIEIER1.bit.INTx1 = 1; PieCtrlRegs.PIEIER1.bit.INTx2 = 1; PieCtrlRegs.PIEIER5.bit.INTx9 = 1; // SDFM1 interrupt enabled PieCtrlRegs.PIEIER2.bit.INTx5 = 1; EINT; #ifdef CPU1 pinMuxoption = SDFM_PIN_MUX_OPTION1; // // Configure GPIO pins as SDFM pins // Sdfm_configurePins(pinMuxoption); #endif // // Select SDFM1 // gPeripheralNumber = SDFM1; // // Input Control Module // // Configure Input Control Mode: Modulator Clock rate = Modulator data rate // Sdfm_configureInputCtrl(gPeripheralNumber, FILTER1, MODE_0); //Sdfm_configureInputCtrl(gPeripheralNumber, FILTER2, MODE_0); // Sdfm_configureInputCtrl(gPeripheralNumber, FILTER3, MODE_0); // Sdfm_configureInputCtrl(gPeripheralNumber, FILTER4, MODE_0); // // Comparator Module // HLT = 0x7333;//<-29491=+50mV //0x7530; //0x7FFF;=32767 //Over value threshold settings LLT = 0x0ccd;//<-3217=-50mV//0x0ad0; //0x0000;=0 //Under value threshold settings // // Configure Comparator module's comparator filter type and comparator's OSR // value, higher threshold, lower threshold // Sdfm_configureComparator(gPeripheralNumber, FILTER1, SINC3, OSR_32, HLT, LLT); Sdfm_configureComparator(gPeripheralNumber, FILTER2, SINC3, OSR_32, HLT, LLT); Sdfm_configureComparator(gPeripheralNumber, FILTER3, SINC3, OSR_32, HLT, LLT); Sdfm_configureComparator(gPeripheralNumber, FILTER4, SINC3, OSR_32, HLT, LLT); // // Enable Master filter bit: Unless this bit is set none of the filter modules // can be enabled. All the filter modules are synchronized when master filter // bit is enabled after individual filter modules are enabled. All the filter // modules are asynchronized when master filter bit is enabled before // individual filter modules are enabled. // Sdfm_enableMFE(gPeripheralNumber); // // Data filter Module // // Configure Data filter modules filter type, OSR value and // enable / disable data filter // Sdfm_configureData_filter(gPeripheralNumber, FILTER1, FILTER_ENABLE, SINC3, OSR_64, DATA_16_BIT, SHIFT_4_BITS); Sdfm_configureData_filter(gPeripheralNumber, FILTER2, FILTER_DISABLE, SINC3, OSR_64, DATA_16_BIT, SHIFT_4_BITS); Sdfm_configureData_filter(gPeripheralNumber, FILTER3, FILTER_DISABLE, SINC3, OSR_64, DATA_16_BIT, SHIFT_4_BITS); Sdfm_configureData_filter(gPeripheralNumber, FILTER4, FILTER_DISABLE, SINC3, OSR_64, DATA_16_BIT, SHIFT_4_BITS); //32 OSR mit 1 Bitshift //64 OSR mit 4 Bistshift // // PWM11.CMPC, PWM11.CMPD, PWM12.CMPC and PWM12.CMPD signals cannot synchronize // the filters. This option is not being used in this example. // /////////////////////////////////////////////////////////////////////////// //Änderung auf kein Reset Sdfm_configureExternalreset(gPeripheralNumber,FILTER_1_EXT_RESET_DISABLE, FILTER_2_EXT_RESET_DISABLE, FILTER_3_EXT_RESET_DISABLE, FILTER_4_EXT_RESET_DISABLE); /* Sdfm_configureExternalreset(gPeripheralNumber,FILTER_1_EXT_RESET_ENABLE, FILTER_2_EXT_RESET_ENABLE, FILTER_3_EXT_RESET_ENABLE, FILTER_4_EXT_RESET_ENABLE); */ /////////////////////////////////////////////////////////////////////////// // // Init EPWMs // InitEPwm(); // // Enable interrupts // // Following SDFM interrupts can be enabled / disabled using this function. // Enable / disable comparator high threshold // Enable / disable comparator low threshold // Enable / disable modulator clock failure // Enable / disable filter acknowledge //////////////////////////////////////////////////////////////////////// //Neu Interrupt Ferigaben bei Schwellwertüberschreitutngen Sdfm_configureInterrupt(gPeripheralNumber, FILTER1, IEH_ENABLE, IEL_ENABLE, MFIE_ENABLE, AE_ENABLE); Sdfm_configureInterrupt(gPeripheralNumber, FILTER2, IEH_DISABLE, IEL_DISABLE, MFIE_DISABLE, AE_DISABLE); Sdfm_configureInterrupt(gPeripheralNumber, FILTER3, IEH_DISABLE, IEL_DISABLE, MFIE_DISABLE, AE_DISABLE); Sdfm_configureInterrupt(gPeripheralNumber, FILTER4, IEH_DISABLE, IEL_DISABLE, MFIE_DISABLE, AE_DISABLE); //////////////////////////////////////////////////////////////////////// while((*EPWM[gPWM_number]).TBCTR < 550); // // Enable master interrupt so that any of the filter interrupts can trigger // by SDFM interrupt to CPU // Sdfm_enableMIE(gPeripheralNumber); //////////////////////////////////////// //Konfiguration von DAC Aufruf configureDAC(DAC_NUM); //////////////////////////////////////// //ADC anstoßen, um Verarbeitung zu beginnen // //start ePWM // EPwm2Regs.ETSEL.bit.SOCAEN = 1; //enable SOCA EPwm2Regs.TBCTL.bit.CTRMODE = 0; //unfreeze, and enter up count mode //////////////////////////////////////// //Endlose Funktion while(1) { DAC_PTR[DACB]->DACVALS.all = AdcaResultRegs.ADCRESULT0; DAC_PTR[DACC]->DACVALS.all = AdcaResultRegs.ADCRESULT3; }; } // // Sdfm1_ISR - SDFM 1 ISR // __interrupt void Sdfm1_ISR(void) { uint32_t sdfmReadFlagRegister = 0; //static uint16_t loopCounter1 = 0; // // Read SDFM flag register (SDIFLG) // sdfmReadFlagRegister = Sdfm_readFlagRegister(gPeripheralNumber); //Test mit if-Abfrage if(sdfmReadFlagRegister >= 0x7ffff000 )//Vergleich mit dem aktuellen Wert des Flag-Registers. Sobald Datenwerte vorliegen ist die Bedingung erfüllt. {//10000000000000000001000000000000=Bit 31 und bit 12 sind wenigstens high //Filter1_Result[1] = SDFM2_READ_FILTER1_DATA_16BIT; unsigned int x1 = SDFM1_READ_FILTER1_DATA_16BIT >> 3; DAC_PTR[DACA]->DACVALS.all =(short) 0xf800 + x1; // // Clear SDFM flag register // Sdfm_clearFlagRegister(gPeripheralNumber,sdfmReadFlagRegister); sdfmReadFlagRegister = Sdfm_readFlagRegister(gPeripheralNumber); } //else if (sdfmReadFlagRegister) && (sdfmReadFlagRegister) /* else if (sdfmReadFlagRegister >= 0x00000080)//Vergleich mit dem aktuellen Wert des Flag-Registers. Sobald ein Schwellenwert überschritten wurde ist die Bedingung erfüllt. {// // Clear SDFM flag register // Sdfm_clearFlagRegister(gPeripheralNumber,sdfmReadFlagRegister); sdfmReadFlagRegister = Sdfm_readFlagRegister(gPeripheralNumber); }*/ else if ((sdfmReadFlagRegister <= 0xfffd) && (sdfmReadFlagRegister > 0x0000)) //Vergleich mit dem aktuellen Wert des Flag-Registers. Sobald ein Schwellenwert überschritten wurde ist die Bedingung erfüllt. {//10000000000000000000000000000011 bit 31 und Bit 1 und 2 sind high oder weniger und wenigstens Bit 31 //0x7ffffffd //0x80000000 GpioDataRegs.GPASET.bit.GPIO4=1; // Clear SDFM flag register // Sdfm_clearFlagRegister(gPeripheralNumber,sdfmReadFlagRegister); sdfmReadFlagRegister = Sdfm_readFlagRegister(gPeripheralNumber); } /*//Weiterführung der if-else-Struktur für weitere Bedingungen else if () {} else {}*/ // // Acknowledge this __interrupt to receive more __interrupts from group 5 // //PieCtrlRegs.PIEACK.all = PIEACK_GROUP5; //Nur Zurücksetzen von Group5 PieCtrlRegs.PIEACK.all = PIEACK_GROUP5; } // // Sdfm_configurePins - Configure SDFM GPIOs // void Sdfm_configurePins(uint16_t sdfmPinOption) { uint16_t pin; switch (sdfmPinOption) { case SDFM_PIN_MUX_OPTION1: for(pin=16;pin<=31;pin++) { GPIO_SetupPinOptions(pin, GPIO_INPUT, GPIO_ASYNC); GPIO_SetupPinMux(pin,GPIO_MUX_CPU1,7); } break; case SDFM_PIN_MUX_OPTION2: for(pin=48;pin<=63;pin++) { GPIO_SetupPinOptions(pin, GPIO_INPUT, GPIO_ASYNC); GPIO_SetupPinMux(pin,GPIO_MUX_CPU1,7); } break; case SDFM_PIN_MUX_OPTION3: for(pin=122;pin<=137;pin++) { GPIO_SetupPinOptions(pin, GPIO_INPUT, GPIO_ASYNC); GPIO_SetupPinMux(pin,GPIO_MUX_CPU1,7); } break; } } // // InitEPwm - Initialize specified EPWM settings // void InitEPwm(void) { uint16_t CMPC,CMPD; CMPC = 2; CMPD = 2; #ifdef CPU1 GPIO_SetupPinOptions(4, GPIO_OUTPUT, GPIO_ASYNC); GPIO_SetupPinMux(4,GPIO_MUX_CPU1,1); #endif EALLOW; // // Allows all users to globally synchronize all enabled ePWM modules to // the time-base clock (TBCLK) // CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1; // // Setup TBCLK // (*EPWM[gPWM_number]).TBPHS.bit.TBPHS = 0x0000; // Phase is 0 (*EPWM[gPWM_number]).TBCTR = 0x0000; // Clear counter (*EPWM[gPWM_number]).TBPRD = EPWM_TIMER_TBPRD; // Set timer period // 801 TBCLKs. (*EPWM[gPWM_number]).CMPC = CMPC; // Set Compare C value (*EPWM[gPWM_number]).CMPD = CMPD; // Set Compare D value (*EPWM[gPWM_number]).CMPA.bit.CMPA = CMPC; // Set Compare C value (*EPWM[gPWM_number]).CMPB.bit.CMPB = CMPD; // Set Compare D value // // Setup counter mode // (*EPWM[gPWM_number]).TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up (*EPWM[gPWM_number]).TBCTL.bit.HSPCLKDIV = TB_DIV1; (*EPWM[gPWM_number]).TBCTL.bit.CLKDIV = TB_DIV1; // // Set actions // (*EPWM[gPWM_number]).AQCTLA.bit.CAU = 3; // Set PWM1A on event A, up // count // // Set actions // (*EPWM[gPWM_number]).AQCTLB.bit.CBU = 3; // Set PWM1A on event A, up // count EDIS; } // // done - Function to halt debugger and stop application // void done(void) { asm(" ESTOP0"); for (;;); } ////////////////////////////////////////////////////////////////////////////////////////// void InitEPwmGpio_TZ(void) { EALLOW; GpioCtrlRegs.GPAPUD.bit.GPIO8 = 1; //EPWM5A GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 1; // GpioCtrlRegs.GPAPUD.bit.GPIO9 = 1; //EPWM5B GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 1; // //GPIO Konfiguration für einzelnen Ausgang GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 00; // GpioCtrlRegs.GPADIR.bit.GPIO4 = 1;//GPIO4 wird als Output deklariert EDIS; } // // End of file // //EPM7 nur für Test-Zwecke void InitEPwm5Example() { EALLOW; EPwm5Regs.TBPRD = 4; EPwm5Regs.TBPHS.bit.TBPHS = 0x0000; EPwm5Regs.TBCTR = 0x0000; EPwm5Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; EPwm5Regs.TBCTL.bit.PHSEN = TB_DISABLE; EPwm5Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; EPwm5Regs.TBCTL.bit.CLKDIV = TB_DIV1; EPwm5Regs.CMPA.bit.CMPA = 2; EPwm5Regs.AQCTLA.bit.ZRO =AQ_SET; EPwm5Regs.AQCTLA.bit.CAU = AQ_CLEAR; EPwm5Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; EPwm5Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; EPwm5Regs.DBCTL.bit.IN_MODE = DBA_ALL; EPwm5Regs.DBRED.bit.DBRED = 0; EPwm5Regs.DBFED.bit.DBFED = 0; EPwm5_DB_Direction = DB_UP; EPwm5Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; EPwm5Regs.ETSEL.bit.INTEN = 1; EPwm5Regs.ETPS.bit.INTPRD = ET_3RD; EDIS; } __interrupt void epwm5_isr(void) { EPwm5Regs.ETCLR.bit.INT = 1; } // // configureDAC - Configure specified DAC output //Abänderung -->Konfiguration von zwei DACs void configureDAC(Uint16 dac_num) { EALLOW; DacaRegs.DACCTL.bit.DACREFSEL = REFERENCE; DacaRegs.DACOUTEN.bit.DACOUTEN = 1; DacaRegs.DACVALS.all = 0; //DELAY_US(10); // Delay for buffered DAC to power up DacbRegs.DACCTL.bit.DACREFSEL = REFERENCE; DacbRegs.DACOUTEN.bit.DACOUTEN = 1; DacbRegs.DACVALS.all = 0; //DAC_C DaccRegs.DACCTL.bit.DACREFSEL = REFERENCE; DaccRegs.DACOUTEN.bit.DACOUTEN = 1; DaccRegs.DACVALS.all = 0; DELAY_US(10); // Delay for buffered DAC to power up EDIS; } // ConfigureADC - Write ADC configurations and power up the ADC for both // ADC A and ADC B // void ConfigureADC(void) { EALLOW; // //write configurations // AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4 AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE); // //Set pulse positions to late // AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1; // //power up the ADC // AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1; // //delay for 1ms to allow ADC time to power up // DELAY_US(1000); EDIS; } // ConfigureEPWM - Configure EPWM SOC and compare values // void ConfigureEPWM(void) { EALLOW; // Assumes ePWM clock is already enabled EPwm2Regs.ETSEL.bit.SOCAEN = 0; // Disable SOC on A group EPwm2Regs.ETSEL.bit.SOCASEL = 1; // Select SOC on up-count EPwm2Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 1 EPwm2Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1 EPwm2Regs.CMPA.bit.CMPA = 0x0032;//100dec=0x0064; // Set compare A value to 2048 counts EPwm2Regs.TBPRD = 0x0064;//199dec=0x00c7; // Set period to 4096 counts EPwm2Regs.TBCTL.bit.CTRMODE = 3; // freeze counter EDIS; } // // SetupADCEpwm - Setup ADC EPWM acquisition window // void SetupADCEpwm(Uint16 channel) { Uint16 acqps; // //determine minimum acquisition window (in SYSCLKS) based on resolution // if(ADC_RESOLUTION_12BIT == AdcaRegs.ADCCTL2.bit.RESOLUTION) { acqps = 14; //75ns } else //resolution is 16-bit { acqps = 63; //320ns } // //Select the channels to convert and end of conversion flag // EALLOW; AdcaRegs.ADCSOC0CTL.bit.CHSEL = channel; //SOC0 will convert pin A0 AdcaRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 7;//Änderung auf ePWM2 --vorher 5;=//trigger on ePWM1 SOCA/C AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 2; //end of SOC0 will set INT1 flag AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable INT1 flag AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared //AdcaRegs.ADCINTSEL1N2.bit.INT1CONT =1;//Kontinurierliche Interrups ohne Flag-Zurücksetzung EDIS; } void SetupADCEpwm3(Uint16 channel) { Uint16 acqps; // //determine minimum acquisition window (in SYSCLKS) based on resolution // if(ADC_RESOLUTION_12BIT == AdcaRegs.ADCCTL2.bit.RESOLUTION) { acqps = 14; //75ns } else //resolution is 16-bit { acqps = 63; //320ns } // //Select the channels to convert and end of conversion flag // EALLOW; AdcaRegs.ADCSOC3CTL.bit.CHSEL = channel; //SOC0 will convert pin A3 AdcaRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles AdcaRegs.ADCSOC3CTL.bit.TRIGSEL = 7;//Änderung auf ePWM2 --vorher 5;=//trigger on ePWM1 SOCA/C AdcaRegs.ADCINTSEL1N2.bit.INT2SEL = 3; //end of SOC0 will set INT1 flag AdcaRegs.ADCINTSEL1N2.bit.INT2E = 1; //enable INT1 flag AdcaRegs.ADCINTFLGCLR.bit.ADCINT2 = 1; //make sure INT1 flag is cleared EDIS; } // // adca1_isr - Read ADC Buffer in ISR // //Nicht mehr benutzt, da ein Aufruf in der While-Schleife existiert /* interrupt void adca1_isr(void) { //////////////////////////////////////////////////////////// //neue Interrupt-Befehle des ADCs DAC_PTR[DACB]->DACVALS.all = AdcaResultRegs.ADCRESULT0; DAC_PTR[DACC]->DACVALS.all = AdcaResultRegs.ADCRESULT3; AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; //////////////////////////////////////////////////////////// } */
