Not getting SCI-A receive interrupts on Piccolo experimenters kit with CCS breakpoints

Hi All

We are using Piccolo- A control card with the USB docking station and CCSv4.1 IDE. We want to configure SCI-A to communicate with the PC at 9600 baud , 8 bits, no parity and one stop bit.

When we configure the SCI-A to only receive characters from the PC we are able to hit a breakpoint in the receive ISR. However when we enable the transmit interrupt with the same application we are not hitting the breakpoint in the receive interrupt.

We have not used the FIFOs at this point of time.  Our question is when we have enabled both transmit and receive interrupts on SCI-A then can't we have breakpoints and see what is being received while we are transmitting something?

Our SCI-A configuration is as given below

     SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback

                                   // No parity,8 char bits,

                                  // async mode, idle-line protocol                      

    SciaRegs.SCICTL1.all =0x0023;  // enable TX, RX, internal SCICLK,

                                   // Disable RX ERR, SLEEP, TXWAKE

    SciaRegs.SCICTL2.all =0x0003;

    SciaRegs.SCICTL2.bit.RXBKINTENA =1;

   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block

   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, INT1

   PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2

   IER |= M_INT9;

   EINT;    

    #if (CPU_FRQ_60MHZ)

        SciaRegs.SCIHBAUD    =0x0000;  // 9600 baud @LSPCLK = 15MHz (60 MHz SYSCLK).

        SciaRegs.SCILBAUD    =0x00C2;

    #elif (CPU_FRQ_50MHZ)

        SciaRegs.SCHBAUD     =0x0000;  // 9600 baud @LSPCLK = 12.5 MHz (50 MHz SYSCLK)

    #elif (CPU_FRQ_40MHZ)    =0x00A1;

        SciaRegs.SCIHBAUD    =0x0000;  // 9600 baud @LSPCLK = 10MHz (40 MHz SYSCLK).

        SciaRegs.SCILBAUD    =0x0081;

    #endif

    SciaRegs.SCIPRI.all = 0x00;

interrupt void SCITXINTA_ISR(void)     // SPI-A

{

  // Insert ISR Code here

    if(*pntr == '\0')

    {

    SciaRegs.SCICTL2.bit.TXINTENA =0;

    }

    else

    {

        pntr++;

     SciaRegs.SCITXBUF = *pntr;

       SciaRegs.SCIFFTX.bit.TXFFINTCLR=1; // Clear SCI Interrupt flag

   PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK

    }

}

interrupt void SCIRXINTA_ISR(void)     // SCI-A

{

  // Insert ISR Code here

  if(i<20)

  {

    ReChar[i] = SciaRegs.SCIRXBUF.all;

    i++; 

  }

   SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag

SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack

}

If we have a breakpoint at if(i<20) line in the receive ISR, the CCS never hits this breakpoint. Are we missing any settings? It is strange since if we disable transmit interrupt then we are able to hit the breakpoint in CCS.

Any suggestion would be helpful.

Thanks & Regards

Pravin Angolkar

FAE - TI India