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Original question:

Continuous SPI Interrupts

CCS/TMS320F280049C: Interrupt Nesting

Tobias Ofenberger81
Intellectual 335 points

Part Number: TMS320F280049C

Tool/software: Code Composer Studio

Hello e2e community,

i've a question:

I made a misstake in the isr nesting programming. I set the IER bit for the TIMER1 ISR in its own ISR:

__interrupt void tim1_isr(void){
    
	IER |=  ((1<<12U) | (1<<6) | (1<<5) | (1<<0));  // bit 12 is TIMER1 irq (its own)
    	IER &=  ((1<<12U) | (1<<6) | (1<<5) | (1<<0));  
    	PieCtrlRegs.PIEACK.all = 0xFFFF;    // enable PIE interrupts
    	asm("       NOP");                  // wait one cycle
    	asm(" clrc INTM");                  // clear INTM to enable interrupts

   	// ISR content
    
	CpuTimer1Regs.TCR.bit.TIF = 1;          // clear timer irq flag
    	asm(" setc INTM");      // set INTM to disale interrupts
}

This results in a total software crash. But the crash happens only after a few periods of the isr.  After a couple of time, i found out, that the crash happens only if a new interrupt is pending during the execution of the isr. So i tried to manually set the IFR bit in the ISR to force the problem to exclude other issues:

__interrupt void tim1_isr(void){
    
	IER |=  ((1<<12U) | (1<<6) | (1<<5) | (1<<0));  // bit 12 is TIMER1 irq (its own)
    	IER &=  ((1<<12U) | (1<<6) | (1<<5) | (1<<0));  
    	PieCtrlRegs.PIEACK.all = 0xFFFF;    // enable PIE interrupts
    	asm("       NOP");                  // wait one cycle
    	asm(" clrc INTM");                  // clear INTM to enable interrupts

   	asm(" OR IFR, #0x1000");

   	// ISR content
    
	CpuTimer1Regs.TCR.bit.TIF = 1;          // clear timer irq flag
    	asm(" setc INTM");      // set INTM to disale interrupts
}

After setting the IFR bit in the ISR the software crash happen. 

Can someone explain this issue, that I have a better understanding of the interrupt nesting?

Thank you!

Just for my better understanding:

  • 0
    TI__Guru** 116041 points

    Hi,

    Enabling same interrupt with-in ISR may cause a recursive loop and could cause stack overflow. That may result in software crash. Have you checked that stack is not overflowing in this case?

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Intellectual 335 points

    Hi Vivek,

    thank you for your fast reply, it was my first idea, that this issue cause a stack overflow. I've implemented the online stack overflow detection as in the SPRA820 pdf described. But the ROTS isr (which get triggered from the stack over flow detection) will not trigger but the INT_ILLEGAL isr gets triggered. The strange thing is that sometimes the ILLEGAL service routine gets triggered and in rare cases no isr gets triggered and the program write over all possible memory areas!  Even over the peripheral memory areas! 

    I think, that i've configured the overflow detection properly, because if i force manually a stack overflow with the following code:

        int i;
    for (i=0; i < 10000; i++){
        asm(" push acc");
    }

    the RTOS interrupt will trigger properly. 

    I configure the protection with the following function:

    stat = STKOV_initSystemStack((uint32_t)&stack_start, (uint32_t)&stack_end, 45);

    The return value of the function is always zero, so the protection initialization is always successful. 

  • 0 in reply to Tobias Ofenberger81
    Intellectual 335 points
    I found the problem, i forgot to enable the RTOS interrupt in the timer isr. So if a stack overflow occur in a isr, the fault isr was not enabled. Thank you for you support!