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Hi,
I'm working on a design with the F28M35H52C1 listening to a GPS PPS signal on an external interrupt pin. I'm comparing the latency of the external interrupt by toggling a pin inside the interrupt ISR.
When this interrupt is setup on the M3 core, I see latency of 930-950ns. When the same signal is setup via XINT1 on the C28x core, I see latencies of 400-700ns. I am not worried about the actual latency values as much as I am about the variation in latencies. I'm measuring these using a Digital Discovery 2 running at 800MHz triggered by the source GPS PPS signal.
Both cores are running at 100MHz. Why is the c28x side so inconsistent with how long it takes to get to toggling a pin in the ISR.
C28x Interrupt Setup:
EALLOW; // Setup PPS pin for external interrupt to call pps_interrupt on every // rising edge. PieCtrlRegs.PIECTRL.bit.ENPIE = 1; PieCtrlRegs.PIEIER1.bit.INTx4 = 1; XIntruptRegs.XINT1CR.bit.ENABLE = 1; XIntruptRegs.XINT1CR.bit.POLARITY = 1; GpioTripRegs.GPTRIP4SEL.bit.GPTRIP4SEL = PPS_IN_GPIO_NUM; PieVectTable.XINT1 = &pps_isr; EDIS; __interrupt void pps_isr(void) { GpioDataRegs.GPATOGGLE.bit.GPIO15 = 1; // Acknowledge this interrupt to get more from group 1 PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; }
M3 Interrupt Setup:
GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_7); // Enable processor interrupts. IntMasterEnable(); /* Enable interrupts */ GPIOIntTypeSet(GPIO_PORTA_BASE, GPIO_PIN_7, GPIO_RISING_EDGE); GPIOPinIntEnable(GPIO_PORTA_BASE, GPIO_PIN_7); GPIOPortIntRegister(GPIO_PORTA_BASE, ISR_PPS); interrupt void ISR_PPS() { GPIO_toggle(BURST_CHECK); // Clear interrupt flag so interrupt isn't called over and over. GPIOPinIntClear(GPIO_PORTA_BASE, GPIO_PIN_7); }
Is there some way to make the C28x core service the ISR in a more deterministic manner? I don't mind if it takes like 500ns longer or something as long as it's very close to the same number each time.
Thanks,
Aditya