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TMS320F28069M: ADC Interrupts

Part Number: TMS320F28069M
Other Parts Discussed in Thread: C2000WARE, MOTORWARE

Hi,

I have been debugging an issue getting illegal ISR's while trying to merge an application that was written based on C2000Ware/driverlib with a Lab05d based on Motorware/HAL. Got my head tied in knots debugging through the process, one of the places where I got stuck is with the PieVector table, since HAL maintains it's own vector table and C2000ware has it's own.

Debugging and Looking into:

void HAL_enableAdcInts(HAL_Handle handle)
{
  HAL_Obj *obj = (HAL_Obj *)handle;


  // enable the PIE interrupts associated with the ADC interrupts
  PIE_enableAdcInt(obj->pieHandle,ADC_IntNumber_1);


  // enable the ADC interrupts
  ADC_enableInt(obj->adcHandle,ADC_IntNumber_1);


  // enable the cpu interrupt for ADC interrupts
  CPU_enableInt(obj->cpuHandle,CPU_IntNumber_10);

  return;
} // end of HAL_enableAdcInts() function


void PIE_enableAdcInt(PIE_Handle pieHandle, const ADC_IntNumber_e intNumber)
{
    PIE_Obj *pie = (PIE_Obj *)pieHandle;
    uint16_t index;
    uint16_t setValue;


    if(intNumber < ADC_IntNumber_9)
    {
      index = 9;
      setValue = 1 << intNumber;
    }
    else if(intNumber == ADC_IntNumber_9)
    {
      index = 0;
      setValue = 1 << 5;
    }
    else
    {
      index = 0;
      setValue = 1 << ((intNumber & 0x07) - 1) ;
    }

    // set the value
    pie->PIEIER_PIEIFR[index].IER |= setValue;

    return;
} // end of PIE_enableAdcInt() function

typedef enum
{
  ADC_IntNumber_1=0,        //!< Denotes ADCINT1
  ADC_IntNumber_2,          //!< Denotes ADCINT2
  ADC_IntNumber_3,          //!< Denotes ADCINT3
  ADC_IntNumber_4,          //!< Denotes ADCINT4
  ADC_IntNumber_5,          //!< Denotes ADCINT5
  ADC_IntNumber_6,          //!< Denotes ADCINT6
  ADC_IntNumber_7,          //!< Denotes ADCINT7
  ADC_IntNumber_8,          //!< Denotes ADCINT8
  ADC_IntNumber_9,          //!< Denotes ADCINT9
  ADC_IntNumber_1HP,        //!< Denotes ADCINT1 High Priority for use with PIE_enableAdcInt() only
  ADC_IntNumber_2HP,        //!< Denotes ADCINT2 High Priority for use with PIE_enableAdcInt() only
  ADC_IntNumber_9HP=0xE     //!< Denotes ADCINT9 High Priority for use with PIE_enableAdcInt() only
} ADC_IntNumber_e;

with index = 9 and setValue = 1 in the given context,
the following:

pie->PIEIER_PIEIFR[index].IER |= setValue;

becomes

pie->PIEIER_PIEIFR[9].IER |= 1;


According to spruh18g, 1.7.4 PIE Configuration Registers:

PIEIER9 0x0000 - 0CF2 1 PIE, INT9 Group Enable Register

but, according to Table 1-120. PIE Vector Table:

PIE Group 9 Vectors - MUXed into CPU INT9 are

the SCI-x and CAN-x interrupts.

I can't see clearly how that is working. Most likely, I am missing something here. Can someone please clarify ?

Thanks,

Manu