Tool/software: Code Composer Studio
Hi, TI engineer!
As shown in the above figure.Input is battery voltage.OP07 operational amplifier differential.Input to DSP ADC pin.How do I calculate the input impedance of ADC in the above figure?Thank you very much.
Hi tlee!
Linker:
The following answer is included in the link.
Ok, yeah we can explain the behavior here. The effective source impedance is extremely high. Since you have a 3-pole filter here, just as a really rough approximation we can say that the total RC time constant is roughly sqrt(RC1^2 + RC2^2 + RC3^2) = sqrt(57.6K*100n^2+ 57.6K*100n^2 + 1K*1n^2) = 8.15ms. To get 1/4LSB settling at 12-bit resolution, you need -ln(0.25/4096) = 9.7 time constants, so for ideal settling your S+H window would need to be in the ballpark of 8.15ms*9.7 = 79.1ms! The maximum S+H window for the ADC runing at 30MHz is 64 ADCCLKs or (1000/30)*64 = 2.1us.
sqrt(RC1^2 + RC2^2 + RC3^2) = sqrt(57.6K*100n^2+ 57.6K*100n^2 + 1K*1n^2) = 8.15ms. I can't get the same answer.How did 8.15ms get it?
