CCS/TMS320F28069: Alternate approach for Older Piccolo devices

Gautam,

do you need the trips to be asynchronous?

What about using DCxEVTy and controlling the output using the TZ? Alternatively you could probably bring the Comparator signal out of the device looping it back to the PWM using TZ 1-3 if you wanted to use the CBC or OSHT behaviors of the trip zone submodule.

Regards,
Cody 

Adding to Gautam's Inputs...

Cody Watkins said:

do you need the trips to be asynchronous?

Yes the requirement is Asynchronous from a external signal fed to Comparator. The Other Comp input is from DAC. The requirement is that the output needs to be set based on one Comparator and cleared based on another comparator.

This is the code that am currently trying out. Am not able to assign two events to the same PWM. Kindly let know if am missing something...

    EPwm1Regs.TBPRD = 6000;                         // Set timer period
    EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phase register to zero
    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Asymmetrical mode
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Phase loading disabled
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
    EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;

    EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // Set PWM1A on Zer


    //
    // Define an event (DCAEVT1) based on TZ1 and TZ2
    //
    
    //
    // DCAH = Comparator 1 output
    //
    EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP1OUT;
    EPwm1Regs.DCTRIPSEL.bit.DCALCOMPSEL = DC_COMP2OUT;
    
    //
    // DCAEVT1 =  DCAH low(will become active as Comparator output goes low)
    //
//    EPwm1Regs.TZDCSEL.bit.DCAEVT1 = TZ_DCAH_HI;
    EPwm1Regs.TZDCSEL.bit.DCAEVT1 = TZ_DCAH_HI; //COMP1
    EPwm1Regs.TZDCSEL.bit.DCAEVT2 = TZ_DCAL_LOW; //COMP2
    
    //
    // DCAEVT1 = DCAEVT1 (not filtered)
    //
    EPwm1Regs.DCACTL.bit.EVT1SRCSEL = DC_EVT1;
    EPwm1Regs.DCACTL.bit.EVT2SRCSEL = DC_EVT2;
    
    EPwm1Regs.DCACTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC;   // Take async path
    EPwm1Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;   // Take async path

    //
    // Enable DCAEVT1 and DCBEVT1 are one shot trip sources
    // Note: DCxEVT1 events can be defined as one-shot.  
    //       DCxEVT2 events can be defined as cycle-by-cycle.
    //
    EPwm1Regs.TZSEL.bit.DCAEVT1 = 1;
    EPwm1Regs.TZSEL.bit.DCAEVT2 = 1;

    //
    // DCAEVTx events can force EPWMxA
    // DCBEVTx events can force EPWMxB
    //
    EPwm1Regs.TZCTL.bit.DCAEVT1 = TZ_FORCE_LO;           // EPWM1A will go high
    EPwm1Regs.TZCTL.bit.DCAEVT2 = TZ_FORCE_HI;           // EPWM1A will go high

Some more info, I tried another way also..., I couldn't get the desired logic yet though... PFA the code snippet..

    EPwm1Regs.TBPRD = 6000;                         // Set timer period
    EPwm1Regs.TBPHS.half.TBPHS = 0; // Set Phase register to zero
    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Asymmetrical mode
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Phase loading disabled
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
    EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;

    EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // Set PWM1A on Zer


    //
    // Define an event (DCAEVT1) based on TZ1 and TZ2
    //
    
    //
    // DCAH = Comparator 1 output
    //
    EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP1OUT;
    EPwm1Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_COMP2OUT;
    
    //
    // DCAEVT1 =  DCAH low(will become active as Comparator output goes low)
    //
//    EPwm1Regs.TZDCSEL.bit.DCAEVT1 = TZ_DCAH_HI;
    EPwm1Regs.TZDCSEL.bit.DCAEVT2 = TZ_DCAH_HI; //COMP1
    EPwm1Regs.TZDCSEL.bit.DCBEVT2 = TZ_DCBH_LOW; //COMP2
    
    //
    // DCAEVT1 = DCAEVT1 (not filtered)
    //
    EPwm1Regs.DCACTL.bit.EVT2SRCSEL = DC_EVT2;
    EPwm1Regs.DCBCTL.bit.EVT2SRCSEL = DC_EVT2;
    
    EPwm1Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;   // Take async path
    EPwm1Regs.DCBCTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;   // Take async path

    //
    // Enable DCAEVT1 and DCBEVT1 are one shot trip sources
    // Note: DCxEVT1 events can be defined as one-shot.  
    //       DCxEVT2 events can be defined as cycle-by-cycle.
    //
    EPwm1Regs.TZSEL.bit.DCBEVT2 = 1;
    EPwm1Regs.TZSEL.bit.DCAEVT2 = 1;

    //
    // DCAEVTx events can force EPWMxA
    // DCBEVTx events can force EPWMxB
    //
    EPwm1Regs.TZCTL.bit.DCAEVT2 = TZ_FORCE_LO;           // EPWM1A will go high
    EPwm1Regs.TZCTL.bit.DCBEVT2 = TZ_FORCE_HI;           // EPWM1A will go high