TMS320F280049: What is the difference between "One Shot "and "cycle by cycle" in the datasheet of TMS320F280049?

Hi,

These are different type of Trip mechanisms inside the ePWM module.
Below is the excerpt from the device TRM.

Cycle-by-Cycle (CBC):
When a cycle-by-cycle trip event occurs, the action specified in the TZCTL[TZA] and TZCTL[TZB] bits
is carried out immediately on the EPWMxA and/or EPWMxB outputs. Table 15-12 lists some of the
possible actions. Independent actions can be specified based on the occurrence of the event while the
counter is counting up and/or while it is counting down by appropriately configuring bits in the TZCTL2
register. Actions specified in the TZCTL2 register take effect only when the ETZE bit in TZCTL2 is set.
Additionally, when a cycle-by-cycle trip event occurs, the cycle-by-cycle trip event flag (TZFLG[CBC])
is set and a EPWMx_TZINT interrupt is generated if it is enabled in the TZEINT register and PIE
peripheral. A corresponding flag for the event that caused the CBC event is also set in register
TZCBCFLG.
If the CBC interrupt is enabled via the TZEINT register, and DCAEVT2 or DCBEVT2 are selected as
CBC trip sources via the TZSEL register, it is not necessary to also enable the DCAEVT2 or DCBEVT2
interrupts in the TZEINT register, as the DC events trigger interrupts through the CBC mechanism.
The specified condition on the inputs is automatically cleared based on the selection made with
TZCLR[CBCPULSE] if the trip event is no longer present. Therefore, in this mode, the trip event is
cleared or reset every PWM cycle. The TZFLG[CBC] and TZCBCFLG flag bits will remain set until they
are manually cleared by writing to the TZCLR[CBC] and TZCBCCLR flag bits. If the cycle-by-cycle trip
event is still present when the TZFLG[CBC] and/or TZCBCFLG register bits are cleared, then these
bits will again be immediately set..
• One-Shot (OSHT):
When a one-shot trip event occurs, the action specified in the TZCTL[TZA] and TZCTL[TZB] bits is
carried out immediately on the EPWMxA and/or EPWMxB output. Table 15-12 lists some of the
possible actions. Independent actions can be specified based on the occurrence of the event while the
counter is counting up and/or while it is counting down by appropriately configuring bits in TZCTL2
register. Actions specified in TZCTL2 register take effect only when ETZE bit in TZCTL2 is set.
Additionally, when a one-shot trip event occurs, the one-shot trip event flag (TZFLG[OST]) is set and a
EPWMx_TZINT interrupt is generated if it is enabled in the TZEINT register and PIE peripheral. A
corresponding flag for the event that caused the OST event is also set in register TZOSTFLG. The
one-shot trip condition must be cleared manually by writing to the TZCLR[OST] bit. If desired,
TZOSTFLG register bit should be cleared by manually writing to the corresponding bit in the
TZOSTCLR register.
If the one-shot interrupt is enabled via the TZEINT register, and DCAEVT1 or DCBEVT1 are selected
as OSHT trip sources via the TZSEL register, it is not necessary to also enable the DCAEVT1 or
DCBEVT1 interrupts in the TZEINT register, as the DC events trigger interrupts through the OSHT
mechanism.