Tool/software: Code Composer Studio
Hi guys, so I've been suffering from the I2C module of the TMS320F28027. I've been through a lot of existing code, mine looks the same but still does not work. I've put a breakpoint in the interrupt , and I use a USB/I2C module to send commands to my C2000 launchpad but still nothing works. Any help would be very appreciated thank you very much .
Code :
/**
* main.c
*/
#include "DSP28x_Project.h"
#include "f2802x_common/include/clk.h" // Header for Clock
#include "f2802x_common/include/gpio.h" // Header for GPIO
#include "f2802x_common/include/pll.h" // Header for PLL
#include "f2802x_common/include/wdog.h" // Header for Watchdog
#include "f2802x_common/include/i2c.h" // Header for Watchdog
#include "f2802x_headers/include/F2802x_PieVect.h" // Header for PIE
#include "f2802x_headers/include/F2802x_I2c.h"
#include "f2802x_common/include/F2802x_I2c_defines.h"
#include "myI2C.h"
void ioInit();
GPIO_Handle myGpio;
__interrupt void i2c_int1a_isr(void);
void I2CA_Init();
volatile Uint16 I2CSTR_snapshot1;
volatile Uint16 I2CSTR_snapshot2;
volatile Uint16 I2CSTR_snapshot3;
void main()
{
// #ifdef _FLASH
// memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
// #endif
InitSysCtrl();
initI2CGpio();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.I2CINT1A = &i2c_int1a_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
I2CA_Init();
PieCtrlRegs.PIEIER8.bit.INTx1 = 1;
// [???] Enable CPU INT8 which is connected to PIE group 8 (I2C)
IER |= M_INT8;
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
while(1) //This will run indefinitely
{
DELAY_US(1000000);
}
}
#define ALT_B_SDA 0x00000001
#define ALT_B_SCL 0x00000004
#define GPAMUX1_CFG 0X00000000
#define GPAMUX2_CFG 0X00000000
#define GPBMUX1_CFG (ALT_B_SDA + ALT_B_SCL)
#define AIOMUX1_CFG (0x00003330) // AIO10-12-14 are AIO, others are default disabled
// The direction register has no effect on pins configured as peripheral functions.
#define GPIOA_DIR 0x00000000 //
#define GPIOB_DIR 0x00000000 //
#define AIO_DIR 0x00005400 // MUX_ADDR2-0 as GPIO outputs only
#define GPIOB_QSEL1 0xF000000F // Asynch input GPIO32 (SDA) and GPIO33 (SCL)
void initI2CGpio(void)
{
EALLOW;
GpioCtrlRegs.GPAMUX1.all = 0x0000; // GPIO functionality GPIO0-GPIO15
GpioCtrlRegs.GPAMUX2.all = 0x0000; // GPIO functionality GPIO16-GPIO31
GpioCtrlRegs.GPBMUX1.all = 0x0000; // GPIO functionality GPIO32-GPIO34
GpioCtrlRegs.AIOMUX1.all = 0x0000;
GpioCtrlRegs.GPADIR.all = 0x0000; // GPIO0-GPIO31 are GP inputs
GpioCtrlRegs.GPBDIR.all = 0x0000; // GPIO32-GPIO34 are inputs
GpioCtrlRegs.AIODIR.all = 0x0000; // AIO2,4,6,19,12,14 are digital inputs
//
GpioCtrlRegs.GPAQSEL1.all = 0x0000; // GPIO0-GPIO15 Synch to SYSCLKOUT
GpioCtrlRegs.GPAQSEL2.all = 0x0000; // GPIO16-GPIO31 Synch to SYSCLKOUT
GpioCtrlRegs.GPBQSEL1.all = 0x0000; // GPIO32-GPIO34 Synch to SYSCLKOUT
//
// Pull-ups can be enabled or disabled
//
GpioCtrlRegs.GPAPUD.all = 0x0000; // Pullup's enabled GPIO0-GPIO31
GpioCtrlRegs.GPBPUD.all = 0x0000; // Pullup's enabled GPIO32-GPIO34
EDIS;
}
int myxdy = 20;
void I2CA_Init()
{
I2caRegs.I2COAR = 0x60; // Own address
I2caRegs.I2CPSC.all = 5; // Prescaler - need 7-12 Mhz on module clk (F2809: 9)
I2caRegs.I2CCLKL = 10; // NOTE: must be non zero
I2caRegs.I2CCLKH = 5; // NOTE: must be non zero
I2caRegs.I2CCNT = 1; // Get 1 byte
I2caRegs.I2CIER.all = 0x18; // Clear interrupts (was 0)
I2caRegs.I2CSTR.bit.RRDY = 1; // Clear flag
I2caRegs.I2CIER.bit.RRDY = 1; // Receive data ready interrupt
I2caRegs.I2CIER.bit.AAS = 0; // [2011-05-13, PP, v2.50] Addressed as slave now disabled
I2caRegs.I2CIER.bit.XRDY = 1; // Transmit data ready interrupt
I2caRegs.I2CIER.bit.SCD = 1; // Stop condition detection
I2caRegs.I2CMDR.all = 0x08A0; // Take I2C out of reset
// Stop I2C when suspended
// A VOOOOOOOOOOOOOOOIR****************************
// I2caRegs.rsvd1 &= ~0x1; // [2018-04-26] Clear the BCM bit (otherwise causes a bug in I2C communication)
I2caRegs.I2CEMDR.bit.BCM =0;
I2caRegs.I2CMDR.bit.FREE = 1;
// Enable interrupts required for this example
// Enable I2C interrupt 1 in the PIE: Group 8 interrupt 1
//PieCtrlRegs.PIEIER8.bit.INTx1 = 1;
I2caRegs.I2CFFRX.all = 0x2040; // Enable RXFIFO, clear RXFFINT,
// [2011-05-10, PP, v2.??] Very important when using the new i2c_isr
RxIndex = 0;
TxIndex = 0;
return;
}
uint16_t myabc = 10;
__interrupt void
i2c_int1a_isr(void) // I2C-A
{
char Flush;
Flush = I2caRegs.I2CDRR;
myabc =myabc+2;
uint16_t IntSource;
IntSource = I2caRegs.I2CSTR.all;
// Read interrupt source
//IntSource = I2caRegs.I2CISRC.bit.INTCODE & 0x7;
//I2CSTR_snapshot2 = I2caRegs.I2CSTR.all;
switch(IntSource)
{
case I2C_NO_ISRC: // =0
{
break;
}
case I2C_ARB_ISRC: // =1
{
break;
}
case I2C_NACK_ISRC: // =2
{
break;
}
case I2C_ARDY_ISRC: // =3
{
I2caRegs.I2CSTR.bit.ARDY = 0;
break;
}
case I2C_AAS_ISRC: // =7
{
break;
}
case I2C_RX_ISRC: // =4
{
break;
}
case I2C_TX_ISRC: // =5
{
break;
}
case I2C_SCD_ISRC: // =6
{
break;
}
default:
asm(" ESTOP0"); // Halt on invalid number.
}
I2CSTR_snapshot3 = I2caRegs.I2CSTR.all;
// Enable further I2C (PIE Group 8) interrupts by acknowledging this one.
PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
}
