TMS320F28377D: EM1CS2 of EMIF held to high when writing data to connected FPGA

Hi Champs,

My customer has a design using F28377D and FPGA. EMIF is configured to 16bit asynchronous. And during their debugging, they found EM1CS2 held to high when writing 16bit data to certain address. So the write operation cannot be performed successfully.

And the schematics of F28377D is attached. 

TMS320F28377DZWTT.pdf

And the initialization code is as follows.
void InitEmif1_16bit(void)
{

     Emif1Initialize();

   //  Emif1_Pinmux_Async_16bit();

     //Configure to run EMIF1 on full Rate (EMIF1CLK = CPU1SYSCLK)
      EALLOW;
      ClkCfgRegs.PERCLKDIVSEL.bit.EMIF1CLKDIV = 1;
      EDIS;
      EALLOW;
     //Grab EMIF1 For CPU1
      Emif1ConfigRegs.EMIF1MSEL.all = 0x93A5CE71;
     //Disable Access Protection (CPU_FETCH/CPU_WR/DMA_WR)
      Emif1ConfigRegs.EMIF1ACCPROT0.all = 0x0;
     // Commit the configuration related to protection. Till this bit remains set
     // content of EMIF1ACCPROT0 register can't be changed.
      Emif1ConfigRegs.EMIF1COMMIT.all = 0X1;
     // Lock the configuration so that EMIF1COMMIT register can't be changed anymore.
      Emif1ConfigRegs.EMIF1LOCK.all = 0x1;
      EDIS;
      //Configure GPIO pins for EMIF1
      setup_emif1_pinmux_async_16bit(0);

       /* EMIF1 CS2 Data bus - 16 bits, Turn around - 3 cycles,
       Read hold - 8 cycles, Read strobe - 10 cycles, Read setup - 10 cycles,
       Write hold - 8 cycles, Write strobe - 10 cycles, Write setup - 10 cycles,
       Extended wait enable - 0U, Strobe mode */
       ASync_cs2_config(0, 1, 3, 8, 10, 10, 8, 10, 10, 0U, 1);
       Emif1Regs.RCSR.bit.FR = 0;

}

Would you kindly help to check the root cause? Thanks.

BR,

Young