Part Number: TMS320F28379D
Tool/software: Code Composer Studio
Hello,
Looking at the TRM there are two numbers which contradict each other.
- In the ADC chapter, table 10-10 states that the conversion time with a prescale ratio of 4 is 41 SYSCLK cycles.
- In the CLA chapter, section 5.5.2.1 states that the time needed by the ADC to complete a conversion is 42 SYSCLK cycles.
So which is it? If I want to read the result of an ADC conversion from the CLA as soon as possible with Early Interrupt mode, do I have to assume n=41 or n=42?
Cheers,
Pierre