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TMS320F28030: SPI in the standalone mode

Expert 1190 points

Part Number: TMS320F28030

Hi,  when  running code in  the standalone  mode, The SPI bus receives two words, The first word is correct, the second word is incorrect. If the sequence is repeated,  the first word is always correct and the second is always incorrect.  Executing the exact same  code in the debug mode  this issue does not exist.

In both cases a word is sent  every second using a SPI clock of 2.5mhz.  the spi is a slave, The clock and data voltages swing 3.3 volts and look well behaved.

the SPI int is in RAM

#pragma CODE_SECTION(spiRxIsr, "ramfuncs");
#pragma CODE_SECTION(spiTxIsr, "ramfuncs");

The INT Rx code

iSpiRxData = SpiaRegs.SPIRXBUF

What am I missing?

  • Hi,

    You are sending a single SPI word every 1 second? what is your word length?
    Are you using FIFO mode? If so What is the RX interrupt level configured to?
    Please define "incorrect". is it missing bits? Just wrong?

    -Mark
  • Hi Mark sending a single word every second.
    the word length is 16 bits.
    using Rx FiFO, 2 byte transmission is repeated. The second word maybe composed with part sof the first word, very repeatable.


    Rx FiFO :

    SpiaRegs.SPIFFRX.bit.RXFFIL = 0x001;

    SpiaRegs.SPIFFRX.bit.RXFFIENA = 1; //RX FIFO interrupt based on RXFFIL match (greater than or equal to) will be enabled.
    SpiaRegs.SPIFFRX.bit.RXFFINTCLR = 1; //Write 1 to clear RXFFINT flag in bit 7.

    SpiaRegs.SPIFFRX.bit.RXFFST = 1;; //Write 0 to reset the FIFO pointer to zero, and hold in reset.
    SpiaRegs.SPIFFRX.bit.RXFFOVFCLR = 1; //Write 1 to clear RXFFOVF flag in bit 15

    SPI setup:

    SpiaRegs.SPICCR.bit.SPICHAR = 0xF;

    The master does  pulses the slave select line after each transmission, after which the select line remains low until the next transmission, Is this a problem

    thanks

  • I am slightly confused at your first few lines:
    At a rate of 1Hz, a 16bit SPI word will be received. This SPI word contains two bytes.
    The first WORD received is correct, but the second WORD is not.

    Am I correct? You are not referring to the first BYTE being correct and the second BYTE being scrambled.

    With that configuration, the RX interrupt will trigger after every word. At 1 second intervals, even if you have a heavily loaded system, I would expect that there is plenty of time to read the last word before the next one comes in.

    Can you share a scope capture of a single word transmission including the chip select? The CS should not be a problem. With that much time between transmissions you would be very susceptible to noise events on the clock line and messing up the internal bit counters.

    -Mark
  • The SPI is set up to receive 16 bits (word), The data pattern is 2 words, each word is sent 1 once per second, after which the pattern is repeated.

    the interrupt reads the pattern, it does not look like the data is being clocked in properly in the standalone mode, But it works great in the debug mode (no change in code), implying it's not a clock issue.

    I'll supply a screen shortly, why does it work using the emulator and not the standalone.

    thanks
  • Hi Mark, The system here does not allow images to be posted, I tried attaching if this does not work  can I sent it you?

    scope_5.zip

  • Yeah, those signals look pretty solid. Is the Blue signal the chip select or just another signal.

    I if you do a search for C2000 + E2E + standalone vs debugger, there are a few different threads out there with similar situations where the debugger runs fine, but standalone does not.

    Is there anything else happening in your system that could behave differently?
    Can you pare down the code to just your SPI functions?
    Do you have pre-initialized variables that would load differently on a Boot?

    I am going to try to get some help here, as this is a rare situation I have not dealt with before. I don't think that it is necessarily tied to SPI

    -Mark
  • Here are some threads along that line.

    e2e.ti.com/.../580852
    e2e.ti.com/.../684789

    -Mark
  • The Blue signal is the chip select, As mention no problem running with the emulator. I cycled the power, send the same sequence it misbehaves.

    I have not tried get modes

    the source code is identical in both cases.

    thanks
  • "As mention no problem running with the emulator. I cycled the power, send the same sequence it misbehaves"
    Indicates that it is not the SPI, but your initialization code on Boot from Flash:

    Please see the wiki page:
    processors.wiki.ti.com/.../FAQs

    -Mark
  • Hi Mark, the code uses the Ti flash template, of which there are only a few code commands.
    I'm a new to this process , to save time can suggest a path forward.

    thanks
  • Jw,

    Have you read through the threads and the wiki page? Do you have specific questions?
    Since you are relatively new to the process, I highly recommend working through the workshop for F28035. This actually shows you how to build an application from scratch, including teaching you the linker files and then how to get it to properly execute from flash. If you get through the workshop, you should understand how it all ties together, and make sure that you are following all of the steps outlined in your own application. Here is the link:
    processors.wiki.ti.com/.../C2000_Archived_Workshops

    An additional path would be to get a working flash example and then modifying the code to add in your SPI functions. But this skips the knowledge that you would gain from working through the workshop.


    -Mark
  • Hi Mark thanks for the link, I will review the linker process over the holidays I have time constraints to deal with. With that's said,
    in the standalone mode and stepping through application my arrays are initialize and it works.


    After power cycling, it looks like the initialization is skipped and app. misbehaves.

    What is the different between power cycling and a reset through the debugger? 

    thanks

  • Please review the Wiki link shared in one of my previous replies. This explicitly covers the differences and how to debug this issue. on a debugger reset, some memory locations may not be reset, but in a power cycle, all RAM will be reset, and must be reinitialized.

    -Mark