TMS320F28379D: Regarding UART Communication and LSPCLK setting

//###########################################################################
//
// FILE:   buffdac_sine_dma_cpu01.c
//
// TITLE:  Buffered DAC Sine Wave Output Using DMA Example
//
//! \addtogroup cpu01_example_list
//! <h1> Buffered DAC Sine DMA (buffdac_sine_dma) </h1>
//!
//! This example generates a sine wave on the buffered DAC output using the DMA
//! to transfer sine values stored in a sine table in GSRAM to DACVALS,
//! DACOUTA/ADCINA0 (HSEC Pin 9) and uses the default DAC reference setting
//! of VDAC.
//!
//! When the DAC reference is set to VDAC, an external reference voltage
//! must be applied to the VDAC pin. This can accomplished by connecting a
//! jumper wire from 3.3V to ADCINB0 (HSEC pin 12).
//!
//! Run the included .js file to add the watch variables.
//!
//! outputFreq_hz = (samplingFreq_hz/SINE_TBL_SIZE)*tableStep
//!
//! The generated waveform can be adjusted with the following variables/macros
//! but require recompile:
//! - \b waveformGain \b : Adjust the magnitude of the waveform.
//! Range is from 0.0 to 1.0. The default value of 0.8003 centers the waveform
//! within the linear range of the DAC.
//! - \b waveformOffset \b : Adjust the offset of the waveform.
//! Range is from -1.0 to 1.0. The default value of 0 centers the waveform.
//! - \b samplingFreq_hz \b : Adjust the rate at which the DAC is updated.
//! Range - Bounded by cpu timer maximum interrupt rate.
//! - \b tableStep \b : The sine table step size.
//! Range - Bounded by sine table size, should be much less than sine table size
//! to have good resolution.
//! - \b REFERENCE \b : The reference for the DAC.
//! Range - REFERENCE_VDAC, REFERENCE_VREF
//! - \b CPUFREQ_MHZ \b : The cpu frequency. This does not set the cpu frequency.
//! Range - See device data manual
//! - \b DAC_NUM \b : The DAC to use.
//! Range - DACA, DACB, DACC
//!
//
//###########################################################################
// $TI Release: F2837xD Support Library v3.05.00.00 $
// $Release Date: Thu Oct 18 15:48:42 CDT 2018 $
// $Copyright:
// Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without 
// modification, are permitted provided that the following conditions 
// are met:
// 
//   Redistributions of source code must retain the above copyright 
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the 
//   documentation and/or other materials provided with the   
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################

//
// Included Files
//
#include "F28x_Project.h"
#include "math.h"
#include "ecgdataexternal.h"
//
// Defines
//`
#define REFERENCE_VDAC        0
#define REFERENCE_VREF        1
#define DACA                  1
#define DACB                  2
#define DACC                  3
#define REFERENCE             REFERENCE_VDAC
#define CPUFREQ_MHZ           200
#define DAC_NUM               DACA
#define PI                    3.14159265
#define ECG_TBL_SIZE          768

//
// Globals
//
Uint16 ECG_TBL[ECG_TBL_SIZE];
#pragma DATA_SECTION(ECG_TBL, "ramgs0");
volatile struct DAC_REGS* DAC_PTR[4] = {0x0,&DacaRegs,&DacbRegs,&DaccRegs};
Uint32 samplingFreq_hz = 256;
Uint16 tableStep = 1;
float waveformGain = 1; // Range 0.0 -> 1.0
float waveformOffset = 0;    // Range -1.0 -> 1.0

volatile Uint16 *DMADest;
volatile Uint16 *DMASource;

//
// Function Prototypes
//
void configureDAC(Uint16 dac_num);
void configureDMA(Uint16 dac_num);
void configureWaveform(void);


//
// Function Prototypes
//
__interrupt void cpu_timer0_isr(void);



//
// Main
//
void main(void)
{
//
// Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
//
    InitSysCtrl();

//
// Disable CPU interrupts
//
    DINT;

//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags are cleared.
//
    InitPieCtrl();

//
// Clear all interrupts and initialize PIE vector table:
//
    IER = 0x0000;
    IFR = 0x0000;
    InitPieVectTable();

//
// Configure DAC
//
    configureDAC(DAC_NUM);

//
// Configure Waveform
//
    configureWaveform();

//
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
   EALLOW;  // This is needed to write to EALLOW protected registers
   PieVectTable.TIMER0_INT = &cpu_timer0_isr;
   EDIS;    // This is needed to disable write to EALLOW protected registers



//
// Initialize Cpu Timers
//
    InitCpuTimers();

//
// Configure Cpu Timer0 to interrupt at specified sampling frequency
//
    ConfigCpuTimer(&CpuTimer0, CPUFREQ_MHZ, 1000000.0/samplingFreq_hz);

//
// Configure DMA
//
    configureDMA(DAC_NUM);

//
// Start Cpu Timer0
//
    CpuTimer0Regs.TCR.all = 0x4000;

//
// Step 5. User specific code, enable __interrupts:
// Configure GPIO34 as a GPIO output pin
//
   EALLOW;
   GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0;
   GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1;
   EDIS;


//
// Enable CPU INT1 which is connected to CPU-Timer 0:
//
   IER |= M_INT1;

//
// Enable TINT0 in the PIE: Group 1 __interrupt 7
//
   PieCtrlRegs.PIEIER1.bit.INTx7 = 1;

//
// Enable global Interrupts and higher priority real-time debug events:
//
   EINT;   // Enable Global __interrupt INTM
   ERTM;   // Enable Global realtime __interrupt DBGM


   while(1);
}

//
// configureDAC - Enable and configure the requested DAC module
//
void configureDAC(Uint16 dac_num)
{
    EALLOW;

    DAC_PTR[dac_num]->DACCTL.bit.DACREFSEL = REFERENCE;
    DAC_PTR[dac_num]->DACOUTEN.bit.DACOUTEN = 1;
    DAC_PTR[dac_num]->DACVALS.all = 0;

    DELAY_US(10); // Delay for buffered DAC to power up

    EDIS;
}

//
// configureDMA - Configures the DMA to read from the SINE table and write to the DAC
//
void configureDMA(Uint16 dac_num)
{
    //
    // Ensure DMA is connected to Peripheral Frame 1 bridge which contains the DAC
    //
    EALLOW;
    CpuSysRegs.SECMSEL.bit.PF1SEL = 1;
    EDIS;

    //
    // Initialize DMA
    //
    DMAInitialize();

    DMASource = (volatile Uint16 *)&ECG_TBL[0];
    DMADest = (volatile Uint16 *)&DAC_PTR[dac_num]->DACVALS;

    //
    // Configure DMA CH1
    //
    DMACH1AddrConfig(DMADest,DMASource);
    DMACH1BurstConfig(0,0,0);
    DMACH1TransferConfig(ECG_TBL_SIZE/tableStep-1,tableStep,0);
    DMACH1WrapConfig(ECG_TBL_SIZE/tableStep-1,0,0,0);
    DMACH1ModeConfig(0,PERINT_ENABLE,ONESHOT_DISABLE,CONT_ENABLE,
                     SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,SIXTEEN_BIT,
                     CHINT_END,CHINT_DISABLE);

    EALLOW;
    DmaClaSrcSelRegs.DMACHSRCSEL1.bit.CH1 = DMA_TINT0;    // Timer0 is DMA trigger
    EDIS;

    StartDMACH1(); // Start DMA channel
}

//
// configureWaveform - Configure the SINE waveform
//
void configureWaveform(void)
{
    Uint16 j;
    float offset;
    float waveformValue;

    //
    // Fill Sine Table
    //
    for(j=0;j<ECG_TBL_SIZE;j++)
    {
        ECG_TBL[j] = data[j];
    }

    //
    // Adjust for Gain and Offset
    //
    offset = (ECG_TBL[0] - (ECG_TBL[0]*waveformGain)) + (ECG_TBL[0]*waveformOffset);

    for(j=0;j<ECG_TBL_SIZE;j++)
    {
        waveformValue = (ECG_TBL[j]*waveformGain)+offset;
        ECG_TBL[j] = waveformValue < 0 ? 0 : waveformValue > 4095 ? 4095 : waveformValue;
    }
}

//
// cpu_timer0_isr - CPU Timer0 ISR that toggles GPIO32 once per 500ms
//
__interrupt void cpu_timer0_isr(void)
{
   CpuTimer0.InterruptCount++;
   GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;

   //
   // Acknowledge this __interrupt to receive more __interrupts from group 1
   //
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

//
// End of file
//