CCS/TMS320F28377S: TMS320F28377S

vadim piskun

Part Number: TMS320F28377S
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

I am getting this error:

**** Build of configuration CPU1_RAM for project 160kHz_one_input_two_out_SecondLPF ****

"C:\\ti\\ccsv8\\utils\\bin\\gmake" -k all

Building file: "../160kHz_one_input_two_out_SecondLPF.c"
Invoking: C2000 Compiler
"C:/ti/ccsv8/tools/compiler/ti-cgt-c2000_18.1.2.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --include_path="C:/ti/ccsv8/tools/compiler/ti-cgt-c2000_18.1.2.LTS/include" --include_path="C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/headers/include" --include_path="C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/common/include" --include_path="C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/examples/cpu1/cla_adc_fir32/cpu01/" --define=_LAUNCHXL_F28377S --define=CPU1 -g --diag_suppress=10063 --diag_suppress=10068 --diag_suppress=1311 --diag_warning=225 --diag_wrap=off --display_error_number --preproc_with_compile --preproc_dependency="160kHz_one_input_two_out_SecondLPF.d_raw" "../160kHz_one_input_two_out_SecondLPF.c"
Finished building: "../160kHz_one_input_two_out_SecondLPF.c"

Building target: "160kHz_one_input_two_out_SecondLPF.out"
Invoking: C2000 Linker
"C:/ti/ccsv8/tools/compiler/ti-cgt-c2000_18.1.2.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --define=_LAUNCHXL_F28377S --define=CPU1 -g --diag_suppress=10063 --diag_suppress=10068 --diag_suppress=1311 --diag_warning=225 --diag_wrap=off --display_error_number -z -m"160kHz_one_input_two_out_SecondLPF.map" --stack_size=0x100 --warn_sections -i"C:/ti/ccsv8/tools/compiler/ti-cgt-c2000_18.1.2.LTS/lib" -i"C:/ti/ccsv8/tools/compiler/ti-cgt-c2000_18.1.2.LTS/include" -i"C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/common/cmd" -i"C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/headers/cmd" --reread_libs --display_error_number --xml_link_info="160kHz_one_input_two_out_SecondLPF_linkInfo.xml" --rom_model -o "160kHz_one_input_two_out_SecondLPF.out" "./160kHz_one_input_two_out_SecondLPF.obj" "./F2837xS_Adc.obj" "./F2837xS_CodeStartBranch.obj" "./F2837xS_DefaultISR.obj" "./F2837xS_EPwm.obj" "./F2837xS_GlobalVariableDefs.obj" "./F2837xS_Gpio.obj" "./F2837xS_PieCtrl.obj" "./F2837xS_PieVect.obj" "./F2837xS_SysCtrl.obj" "./F2837xS_usDelay.obj" "./fir32.obj" -llibc.a -lrts2800_fpu32.lib -l2837xS_RAM_CLA_lnk_cpu1.cmd -lF2837xS_Headers_nonBIOS.cmd
<Linking>
"C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/common/cmd/2837xS_RAM_CLA_lnk_cpu1.cmd", line 73: error #10099-D: program will not fit into available memory. placement with alignment/blocking fails for section ".text" size 0x1282 page 0. Available memory ranges:
RAMM0 size: 0x2de unused: 0x0 max hole: 0x0
RAMD0 size: 0x800 unused: 0xd max hole: 0xd
RAMD1 size: 0x800 unused: 0x12 max hole: 0x12
error #10010: errors encountered during linking; "160kHz_one_input_two_out_SecondLPF.out" not built

>> Compilation failure
makefile:153: recipe for target '160kHz_one_input_two_out_SecondLPF.out' failed
gmake: *** [160kHz_one_input_two_out_SecondLPF.out] Error 1
gmake: Target 'all' not remade because of errors.

**** Build Finished ****

How can I figure which part does not fit into section ".text" size 0x1282 page 0?

If I look into linker memory map I have this line

".text.1 0 00000000 00000037 FAILED TO ALLOCATE"

view/memory allocation gives me a red line with 55 number in it.

Before using CLA I used all defaults setting, all programs fit. But with CLA I found a couple extra lines of code can cause this error. I looked through

C28x Compiler - Understanding Linking

but still struggle to understand which part of the code goes to where, how do
I control it. .spru513 states that .text section contains exe code. How can I find out how many bytes I am above the limit?

thanks vadim

over 7 years ago

0 Baskaran Chidambaram over 7 years ago

TI__Genius 17370 points

Can you provide more details on the change you made over the working one.

"Before using CLA I used all defaults setting, all programs fit. But with CLA I found a couple extra lines of code can cause this error"

0 vadim piskun over 7 years ago in reply to Baskaran Chidambaram

Expert 2230 points

EPwm7Regs.CMPA.bit.CMPA = voltFilt; //this line is working
EPwm7Regs.CMPA.bit.CMPA = voltFilt*SineLUT[a]+512; // this line causes the error

0 vadim piskun over 7 years ago in reply to vadim piskun

Expert 2230 points

voltFilt is used by CLA as in fir32 examle
****

MF32TOUI16 MR2,MR3 ; Get back to Uint16 value
MMOV16 @_voltFilt, MR2 ; Output
MUI16TOF32 MR0, @_AdcaResultRegs.ADCRESULT0 ; Read ADCRESULT0 and convert to float
MMOV32 @_X0, MR0
MSTOP ; End task
_Cla1T7End:

0 Baskaran Chidambaram over 7 years ago in reply to vadim piskun

TI__Genius 17370 points

you may need to increase the memory allocated to .text section by modifying below line in linker cmd file.
text : >> RAMM0 | RAMD0 | RAMD1

0 vadim piskun over 7 years ago in reply to Baskaran Chidambaram

Expert 2230 points

Hi Baskaran,
I am using 2837xS_RAM_CLA_lnk_cpu1.cmd from c2000ware that does have this line.
***
/ The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C

MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */

BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMD1 : origin = 0x00B800, length = 0x000800
/* RAMLS4 : origin = 0x00A000, length = 0x000800 */
/* RAMLS5 : origin = 0x00A800, length = 0x000800 */
RAMLS4_5 : origin = 0x00A000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002

PAGE 1 :

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */

RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on , F28377S, F28375S devices. Remove line on other devices. */
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on , F28377S, F28375S devices. Remove line on other devices. */
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on , F28377S, F28375S devices. Remove line on other devices. */
RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on , F28377S, F28375S devices. Remove line on other devices. */

CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800

CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
}

SECTIONS
{
codestart : > BEGIN, PAGE = 0
.text : >> RAMM0 | RAMD0 | RAMD1, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

.stack : > RAMM1, PAGE = 1
.ebss : > RAMLS2, PAGE = 1
.econst : > RAMLS3, PAGE = 1
.esysmem : > RAMLS3, PAGE = 1
Filter_RegsFile : > RAMGS0, PAGE = 1

/* CLA specific sections */
Cla1Prog : > RAMLS4_5, PAGE=0

CLADataLS0 : > RAMLS0, PAGE=1
CLADataLS1 : > RAMLS1, PAGE=1

Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1

/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} > RAMM0, PAGE = 0
#else
ramfuncs : > RAMM0 PAGE = 0
#endif
#endif

#ifdef CLA_C
/* CLA C compiler sections */
//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > RAMLS1, PAGE = 1

.scratchpad : > RAMLS1, PAGE = 1
.bss_cla : > RAMLS1, PAGE = 1
.const_cla : > RAMLS1, PAGE = 1
#endif //CLA_C
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/
*******
thanks vadim

0 vadim piskun over 7 years ago in reply to vadim piskun

Expert 2230 points

BTW when I switch to 2837xS_FLASH_CLA_lnk_cpu1.cmd it completes without any error.
thanks vadim

0 vadim piskun over 7 years ago in reply to vadim piskun

Expert 2230 points

this is the flash file
*****
// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C

MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */

BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMD1 : origin = 0x00B800, length = 0x000800
/* RAMLS4 : origin = 0x00A000, length = 0x000800 */
/* RAMLS5 : origin = 0x00A800, length = 0x000800 */
RAMLS4_5 : origin = 0x00A000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002

PAGE 1 :

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */

RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on , F28377S, F28375S devices. Remove line on other devices. */
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on , F28377S, F28375S devices. Remove line on other devices. */
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on , F28377S, F28375S devices. Remove line on other devices. */
RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on , F28377S, F28375S devices. Remove line on other devices. */

EMIF1_CS0n : origin = 0x80000000, length = 0x10000000
EMIF1_CS2n : origin = 0x00100000, length = 0x00200000
EMIF1_CS3n : origin = 0x00300000, length = 0x00080000
EMIF1_CS4n : origin = 0x00380000, length = 0x00060000
EMIF2_CS0n : origin = 0x90000000, length = 0x10000000
EMIF2_CS2n : origin = 0x00002000, length = 0x00001000

CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800

CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
}

SECTIONS
{
codestart : > BEGIN, PAGE = 0
.text : >> RAMM0 | RAMD0 | RAMD1, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

.stack : > RAMM1, PAGE = 1
.ebss : > RAMLS2, PAGE = 1
.econst : > RAMLS3, PAGE = 1
.esysmem : > RAMLS3, PAGE = 1
Filter_RegsFile : > RAMGS0, PAGE = 1

.em1_cs0 : > EMIF1_CS0n, PAGE = 1
.em1_cs2 : > EMIF1_CS2n, PAGE = 1
.em1_cs3 : > EMIF1_CS3n, PAGE = 1
.em1_cs4 : > EMIF1_CS4n, PAGE = 1
.em2_cs0 : > EMIF2_CS0n, PAGE = 1
.em2_cs2 : > EMIF2_CS2n, PAGE = 1

/* CLA specific sections */
Cla1Prog : > RAMLS4_5, PAGE=0

CLADataLS0 : > RAMLS0, PAGE=1
CLADataLS1 : > RAMLS1, PAGE=1

Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1

/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} > RAMM0, PAGE = 0
#else
ramfuncs : > RAMM0 PAGE = 0
#endif
#endif

#ifdef CLA_C
/* CLA C compiler sections */
//
// Must be allocated to memory the CLA has write access to
//
CLAscratch :
{ *.obj(CLAscratch)
. += CLA_SCRATCHPAD_SIZE;
*.obj(CLAscratch_end) } > RAMLS1, PAGE = 1

.scratchpad : > RAMLS1, PAGE = 1
.bss_cla : > RAMLS1, PAGE = 1
.const_cla : > RAMLS1, PAGE = 1
#endif //CLA_C
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 Baskaran Chidambaram over 7 years ago in reply to vadim piskun

TI__Genius 17370 points

i dont see much difference between RAM and Flash linker files that you shared.

Also i see that Flash linker command file is different from the one released in C2000Ware.

Please recheck with as-is version from C2000Ware.

0 vadim piskun over 7 years ago in reply to Baskaran Chidambaram

Expert 2230 points

Hi Baskaran,
Flash is working and I did not modified the .cmd file. I need to make it to work from RAM, but the RAM.cmd file from C2000ware does not work. Is it possible to identify what causes the out of memory error? I have Version: 8.2.0.00007 and there is no further update for the c2000 compiler
thanks vadim

0 Baskaran Chidambaram over 7 years ago in reply to vadim piskun

TI__Genius 17370 points

0 vadim piskun over 7 years ago in reply to Baskaran Chidambaram

Expert 2230 points

Hi Baskaran,

I tried it.

*****

<Linking>
"C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/common/cmd/2837xS_RAM_LARGE_CLA_lnk_cpu1.cmd", line 74: warning #10097: memory range not found: RAMLS0 on page 0
"C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/common/cmd/2837xS_RAM_LARGE_CLA_lnk_cpu1.cmd", line 74: warning #10097: memory range not found: RAMLS1 on page 0
"C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/common/cmd/2837xS_RAM_LARGE_CLA_lnk_cpu1.cmd", line 74: warning #10097: memory range not found: RAMLS2 on page 0
"C:/ti/C2000Ware_1_00_05_00_Software/device_support/f2837xs/common/cmd/2837xS_RAM_LARGE_CLA_lnk_cpu1.cmd", line 74: error #10099-D: program will not fit into available memory. placement with alignment/blocking fails for section ".text" size 0x12b0 page 0. Available memory ranges:
RAMM0 size: 0x2de unused: 0x0 max hole: 0x0
RAMD0 size: 0x800 unused: 0x4 max hole: 0x4
RAMD1 size: 0x800 unused: 0x11 max hole: 0x11
error #10010: errors encountered during linking; "160kHz_one_input_two_out_SecondLPF.out" not built

thanks vadim

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CCS/TMS320F28377S: TMS320F28377S

C28x Compiler - Understanding Linking