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LAUNCHXL-F28379D: Random adc noise observed during test

Part Number: LAUNCHXL-F28379D


Recently we have met some issue during our software development when using F28377SPZPS chip on our own board. The issue is that when we do the ADC sampling, there is always noise in the signal that we sampled. 

We observed the same noise on LAUNCHXL-F28379D by using both example code(adc_soc_epwm_cpu01) and our own code. We are not quite sure this is a hardware issue.

Here is how we notice this issue and how we trying to solve:

  1. The first time we notice this noise is when we do the control, the current always has some unknown peak, we thought it is the control issue, but finally turns out that the current we sampled has random noise;
  2. When we debug, first we checked the hardware input and reference 3.3V signal. All the signal is clean. Also, we eliminated the possibility that ground causes this;
  3. Then we checked the ADC configuration, we thought it may be caused by the clock configuration or S/H window is too small. Then we lower the clock rate(PRESCALE = 6) and enlarge the ACQPS register (set to 50), it doesn’t help;
  4. We try to use the example code that from TI to test on our board, the issue remains;
  5. We try both example code and our own code on LANCHPAD, the issue remains(but the ADC count spike is smaller than 28377S);

Below is the ADC register value that we recorded on LANCHPAD, the ADC input is using a 1.65V voltage generated by 3.3V on board, the noise is totally random:

  • Hi Li,

    I think your existing debug steps are a good start.

    On the F28379D launchpad, I believe the VREFHI is 3.0V and not 3.3V, so for 1.65V you'd expect the mean code to be (1.65V/3.0V)*4096 = 2253

    This input is generated from the board 3.3V rail? Is it filtered?; I wouldn't expect the board power supply to be very quiet.

    Also, if you are using a voltage divider, what is the effective impedance? You may need to increase the S+H duration based on the impedance.

    You might try using at least a 4096*2*14.5pF = 118nF cap on the input with a slow sample rate (so ePWM sampling, not the continuous sampling). In this case S+H duration can be reasonably short.

    To get a really nice clean DC signal you might try using a Signal Generator --> Aggressive LP Filter --> High BW op-amp --> ~30 ohm series resistor --> ~290pF cap to ground --> ADC input. You would want this to all nicely assembled on a prototype board: no long jumper wires (signal generator to board connection should use a shielded cable like a coax BNC cable).