TMS320F28035: EMC issue with ADC

Tino,

I am having a difficult time trying to identify the partial plane in the image.

Based on your observation, I suspect that the noise is more likely to be working its way into the A channels through the PCB traces rather than radiating directly into the die. You might be able to confirm this by shorting an external wire from an A channel to a B channel to see if the noise is now detected on the shorted B channel.

The ADC module is located in the corner of the die nearest the ADC channels. I believe that the A and B capacitors are packed very close together in the ADC module. They do share a single converter core after all. The die is also smaller than the package so we are dealing with small geometries in comparison to the PCB. Radiated noise that is strong enough to affect the A capacitor would almost certainly affect the neighboring B capacitor as well.

-Tommy

Hi Tommy

The partial plane isn't in the image. This image shows the ground layer, and at the location the vias are in the image, the top plane isn't shielded from this partial power plane one layer below the ground layer.

I thought about noise being introduced through the input traces as well. They are however routed almost the same, and I cut the places they aren't, and soldered a short wire over the top plane at those locations. This did not change my measurements. Also, in the device without the partial plane, I do not have significant differences of noise levels between group A and B inputs, whereas the traces are routed exactly the same.

Tino

Tino,

I think I may have misunderstood the scenario. Please allow me to step back and confirm the situational details.

By EMC issue, do you mean that you are detecting EM emissions from the system or that the ADC performance is affected by external emissions? My initial interpretation was that you were seeing noise in the ADC conversions, but this is most likely not the case as 320MHz is well beyond the ADC bandwidth.

If it is EM emissions from the system, how were you able to identify the area near the A-channels as the EM source? Did you use a sniffer probe? Or did the emissions cease when ADC sampling was disabled?

I'm not sure if it is effective to review the layout over the forum. I think I would need more detailed information about the board to make educated guesses. For example, I cannot tell if the large circular outlines around the vias are annular rings on another layer or if it is clearance on the ground plane. If it is clearance on the ground, the plane may be compromised in its ability to act as a clean return path for signals that are switching on adjacent layers.

-Tommy