Part Number: TMS320F28379D
Tool/software: Code Composer Studio
Dear support
I use spi dma for working with FPGA.
SPI work good without DMA support, but with DMA we have some problems. In scope I see that FPGA send correct data, but in the "rdata" buffer I see the previous data.
I have to read twice(call StartDMACH6()) and only after it get the correct data in "rdata" buffer.
C3 include RX data 0xAAAA that is correct after the 1st StartDMACH6() calling
.My SPI setting is:
SpiaRegs.SPIFFRX.all=0x2040; // RX FIFO enabled, clear FIFO int
SpiaRegs.SPIFFRX.bit.RXFFIL = 3; // Set RX FIFO level
SpiaRegs.SPIFFTX.all=0xE040; // FIFOs enabled, TX FIFO released,
SpiaRegs.SPIFFTX.bit.TXFFIL = 3; // Set TX FIFO level
My DMA setting is:
#pragma DATA_SECTION("ramgs0"); // map the TX data to memory
Uint16 sdata[4] = {0}; // Send data buffer
#pragma DATA_SECTION("ramgs1"); // map the RX data to memory
Uint16 rdata[4] = {0};
#define BURST 2
#define TRANSFER 0
void dma_init()
{
//
// Initialize DMA
//
DMAInitialize();
DMASource = (volatile Uint16 *)sdata;
DMADest = (volatile Uint16 *)rdata;
//
// configure DMACH5 for TX
//
DMACH5AddrConfig(&SpiaRegs.SPITXBUF,DMASource);
DMACH5BurstConfig(BURST,1,0); // Burst size, src step, dest step
DMACH5TransferConfig(TRANSFER,1,0); // transfer size, src step, dest step
DMACH5ModeConfig(DMA_SPIATX,PERINT_ENABLE,ONESHOT_DISABLE,CONT_DISABLE,
SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,SIXTEEN_BIT,
CHINT_END,CHINT_ENABLE);
//
// configure DMA CH2 for RX
//
DMACH6AddrConfig(DMADest,&SpiaRegs.SPIRXBUF);
DMACH6BurstConfig(BURST,0,1);
DMACH6TransferConfig(TRANSFER,0,1);
DMACH6ModeConfig(DMA_SPIARX,PERINT_ENABLE,ONESHOT_DISABLE,CONT_DISABLE,
SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,SIXTEEN_BIT,
CHINT_END,CHINT_ENABLE);
}
StartDMACH5(); // Start SPI TX DMA channel
StartDMACH6(); // Start SPI RX DMA channel
it seems that I have problem with spi fifo setting.
could you pls help me to fix the problem
Thanks,Sabina
