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CCS/TMS320F28377S: Program gets stuck on PLL lock in the initialization

Part Number: TMS320F28377S

Tool/software: Code Composer Studio

I'm creating a complex project from separate different mini-projects tested individually. The project involves external async memory, PWM, Trip Zones, GPIOs, A2D, interrupts, CLA etc. Each part was tested separately. However, the integration project, based on the (randomly chosen) TI "epwm_trip_zone" example, gets stuck in the very beginning. When trying to boot and to debug the solution, the code gets stucks on the line “while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1)” in function InitSysPll(), file F2837xS_SysCtrl.c. This place is called from the very beginning of main() as a part of HW_Init(): main() --> (first call in main() ) HW_Init() --> (first call in HWInit(), unmodified TI code starts here) InitSysCtrl() --> InitSysPll(), and the stuck line in context is:

        // Lock the PLL five times. This helps ensure a successful start.
        // Five is the minimum recommended number. The user can increase this
        // number according to allotted system initialization time.
        //
        for(i = 0; i < 5; i++)
        {
            //
            // Turn off PLL
            //
            ClkCfgRegs.SYSPLLCTL1.bit.PLLEN = 0;
            asm(" RPT #20 || NOP");
 
            //
            // Write multiplier, which automatically turns on the PLL
            //
            ClkCfgRegs.SYSPLLMULT.all = ((fmult << 8U) | imult);
 
            //
            // Wait for the SYSPLL lock counter
            //
            while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1)     // <----------------- This is the problematic line.
            {
                //
                // Uncomment to service the watchdog
                //
                // ServiceDog();
            }
        }

This code is run before that my actual code starts to execute.

This part of the code didn’t change from the last successfully run iteration; there are lots of changes in the code, but they are executed after the initial HW is set up. However, I did modify the linker command file in order to allocate space for code and data sections. At the build time, I receive a lot of messages like “#10247-D creating output section ".Cla1Prog" without a SECTIONS”.

This is (probably) not a HW problem, because “blink” example that initializes HW with the very same functions works on the same hardware correctly.

I've looked into the E2E forums; there are 4 questions on the E2E forums regarding the similar issue, none of them solved. Some answers suggest there is a configuration issue, which is what, I suppose, happens with my project too, but I have no idea what configuration change may cause this issue. I've also had personal correspondence with TI employee C. C---mbo (name obscurified in order to hide possibly personal sensitive information), who advised me to take some actions (his words in italic):

The error you get seems pll not able to lock which normally is an Hw issue o the quartz.  

I doubt this is the case, since I’ve tried the “blink” example on the same hardware, and it works. Up to the point of locking the PLL, there are absolutely no differences in the code between the “blink” example and the project I’m trying to run, (which is based on another example – specifically, “epwm_trip_zone”). If I understand correctly, the fact that “blink” works on the same HW means the problem is not in the code, but in the configuration; however, I don’t understand what exactly in the configuration of the project can lead to this behavior.

 could you put your code inside the blink example ? Just to double check it works there

I’m afraid this would be very difficult. If stripping out the code and inserting it into “blink” project is required for debugging, I’ll do it, but basically it would mean rewriting the integration project.

 Please another test could be to test your sw on launchpad if f2837x 

On the launchpad I have exactly the same error. The “blink” example works there too; the integration project gets stuck at the PLL lock line, just as described above.

I've tried to use internal oscillator instead of the external one in call to InitSysPll(); it didn't change anything.

It’s interesting that if I manually omit the PLL locking with the debugger, I encounter a similar problem later in the initialization sequence, in the following lines: 

    //
    // Initialize and wait for CLA1ToCPUMsgRAM
    //
    MemCfgRegs.MSGxINIT.bit.INIT_CLA1TOCPU = 1;
    while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CLA1TOCPU != 1){}; <======== Getting stuck here
 
    //
    // Initialize and wait for CPUToCLA1MsgRAM
    //
    MemCfgRegs.MSGxINIT.bit.INIT_CPUTOCLA1 = 1;
    while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CPUTOCLA1 != 1){}; <=========== And then here

Does it mean that there is some problem with configuration of the CLA memory? The same configuration worked in a separate project. Indeed, I’ve extensively reworked the memory configuration file for the linker. I fully understand that since I omitted the PLL locking, correct boot is not guaranteed, but I need to advance in debugging somehow.

Additional debugging step I've performed is commenting out my code from the integration project, excluding all my .c files but one with the "main()" function and leaving only hardware initialization and "main()", which was modified to just blink the LED on GPIO 31, exactly as the working "blinky" example does. After I did it, the modified integration project keeps being stuck, while the "blinky" project runs Ok.

I've removed the linker command file created by me and used one of the default ones, supplied with the TI C2000 software. It did not change the behavior, - probably the problem is not in the memory allocation.

Next step I'm going to perform is to take the working copy of "blinky" project and try to make it stuck in the same way. Would you please advise me on other ways to debug this problem?

  • Hi,

    It's strange. RAM init for CLA  MSG RAM not working does not depend on the CLA RAM configuration. I am suspecting that this is something to do with linker cmd file. Can you attach you linker cmd file to have a look.

    Regards,

    Vivek Singh

  • Hi,

    Actually, I'm sure the problem is not in the linker file, since the code gets stuck at the same PLL initialization with stock, TI-provided 2837xS_Generic_RAM_lnk.cmd. (Of course, I used it after removing all code from the project and leaving only main() that blinks a LED, — I wrote about this test at the end of my previous message).

    Just for reference, the linker cmd file I was using in my first tests is as follows: 

    // The user must define CLA_C in the project linker settings if using the
    // CLA C compiler
    // Project Properties -> C2000 Linker -> Advanced Options -> Command File 
    // Preprocessing -> --define
    #ifdef CLA_C
    // Define a size for the CLA scratchpad area that will be used
    // by the CLA compiler for local symbols and temps
    // Also force references to the special symbols that mark the
    // scratchpad are. 
    CLA_SCRATCHPAD_SIZE = 0x100;
    --undef_sym=__cla_scratchpad_end
    --undef_sym=__cla_scratchpad_start
    #endif //CLA_C
    
    MEMORY
    {
    PAGE 0 :
       /* BEGIN is used for the "boot to SARAM" bootloader mode   */
    
       BEGIN           	: origin = 0x000000, length = 0x000002
       RAMM0           	: origin = 0x000122, length = 0x0002DE
       RAMD0           	: origin = 0x00B000, length = 0x000800
       RAMD1            : origin = 0x00B800, length = 0x000800
       RAMLS4      		: origin = 0x00A000, length = 0x001000
    //   RAMLS5           : origin = 0x00A800, length = 0x000800
       RAMGS1           : origin = 0x00D000, length = 0x001000
       PROG_RAM			: origin = 0x010000, length = 0x006000
       RESET           	: origin = 0x3FFFC0, length = 0x000002
    
    PAGE 1 :
    
       BOOT_RSVD        : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */
       RAMM1            : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
    
    
       RAMLS0          	: origin = 0x008000, length = 0x000800
       RAMLS1          	: origin = 0x008800, length = 0x000800
       RAMLS2_1      	: origin = 0x009000, length = 0x000400
       RAMLS2_2         : origin = 0x009400, length = 0x000400
       RAMLS3_1      	: origin = 0x009800, length = 0x000400
       RAMLS3_2			: origin = 0x009C00, length = 0x000400
    
       RAMGS0           : origin = 0x00C000, length = 0x001000
       RAMGS1           : origin = 0x00D000, length = 0x001000
       RAMGS2           : origin = 0x00E000, length = 0x001000
       RAMGS3           : origin = 0x00F000, length = 0x001000
    //   RAMGS4           : origin = 0x010000, length = 0x001000
    //   RAMGS5           : origin = 0x011000, length = 0x001000
    //   RAMGS6           : origin = 0x012000, length = 0x001000
    //   RAMGS7           : origin = 0x013000, length = 0x001000
    //   RAMGS8           : origin = 0x014000, length = 0x001000
    //   RAMGS9           : origin = 0x015000, length = 0x001000
       RAMGS10          : origin = 0x016000, length = 0x001000
       RAMGS11          : origin = 0x017000, length = 0x001000
       RAMGS12          : origin = 0x018000, length = 0x001000
       RAMGS13          : origin = 0x019000, length = 0x003000
    //   RAMGS14          : origin = 0x01A000, length = 0x001000
    //   RAMGS15          : origin = 0x01B000, length = 0x001000
                        
       CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080
       CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080
       
    }
    
    
    SECTIONS
    {
       codestart        : > BEGIN,     PAGE = 0
       .text            : > RAMGS13,   PAGE = 1 //> RAMD0|RAMD1|RAMLS4|RAMLS5,   PAGE = 0
       .cinit           : > RAMM0,     PAGE = 0
       .pinit           : > RAMM0,     PAGE = 0
       .switch          : > RAMM0,     PAGE = 0
       .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
    
          // Alexey's additions
       .control         : > PROG_RAM,  PAGE = 0
       .servo_hal       : > PROG_RAM,  PAGE = 0
       .control_mem     : > RAMGS3,    PAGE = 1
       .stack           : > RAMM1,     PAGE = 1
       .dma_buffer      : > RAMGS2,     PAGE = 1
    //   .eeprom_mem      : > RAMGS1,     PAGE = 1
       .buffer1         : > RAMGS2,     PAGE = 1
       .buffer2         : > RAMGS3     PAGE = 1
    //   .econst          : > RAMGS4,    PAGE = 1
       .esysmem         : > RAMM1,     PAGE = 1
    
    
       .stack           : > RAMM1,     PAGE = 1
       .ebss            : > RAMGS2,    PAGE = 1
       .econst          : > RAMGS3,    PAGE = 1
       .esysmem         : > RAMGS3,    PAGE = 1
       Filter_RegsFile  : > RAMGS3,	   PAGE = 1
       
        /* CLA specific sections */
       Cla1Prog         : > RAMLS4, PAGE=0
    
       CLADataLS0		: > RAMLS0, PAGE=1
       CLADataLS1		: > RAMLS1, PAGE=1
    
       Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
      
       /* The following section definition are for SDFM examples */		
       Filter1_RegsFile : > RAMLS2_1,	PAGE = 1, fill=0x1111
       Filter2_RegsFile : > RAMLS2_2,	PAGE = 1, fill=0x2222
       Filter3_RegsFile : > RAMLS3_1,	PAGE = 1, fill=0x3333
       Filter4_RegsFile : > RAMLS3_2,	PAGE = 1, fill=0x4444
      
    #ifdef __TI_COMPILER_VERSION__
        #if __TI_COMPILER_VERSION__ >= 15009000
           .TI.ramfunc      : > RAMM0      PAGE = 0
        #else
           ramfuncs         : > RAMM0      PAGE = 0
        #endif
    #endif
      
    #ifdef CLA_C
       /* CLA C compiler sections */
       //
       // Must be allocated to memory the CLA has write access to
       //
       CLAscratch       :
                         { *.obj(CLAscratch)
                         . += CLA_SCRATCHPAD_SIZE;
                         *.obj(CLAscratch_end) } >  RAMLS1,  PAGE = 1
    
       .scratchpad      : > RAMLS1,       PAGE = 1
       .bss_cla		    : > RAMLS1,       PAGE = 1
       .const_cla	    : > RAMLS1,       PAGE = 1
    #endif //CLA_C
    }
    
    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */
    

  • I do not see anything wrong in linker. Just one observation that you have allocated .stack two times. You may want to correct that.

    Let us know if you were able to reproduce this using blinky example -

    >>>Next step I'm going to perform is to take the working copy of "blinky" project and try to make it stuck in the same way.

    Regards,

    Vivek Singh
  • Hi Alexey,
    Do you further debug info on this issue?

    Regards,
    Vivek Singh
  • I got the same problem. Adding a small delay before the PLL initialization. solves the problem. If there is not enough code(time) between the start (@power up) of the program and the pll init. then the PLL doesn't lock.

  • Thank you for the suggestion, I will try this method.

    Thanks,
    Alexey.
  • Alexey, did adding delay solve the issue? If yes, can you please let us know what version of SW you are using? Also share the code with out delay (non-working) and with delay (working).

    Regards,
    Vivek Singh
  • No, I added a 1 mircosecond delay before attempting to lock the PLL, and it didn't help. It still locks in the same place.

    I've managed to cause the problem again, by choosing the linker file for Flash, compiling and trying to run. After that, I switched back to 2837x_RAM_lnk_cpu1.cmd, but it did not help; the project still locks on PLL.

    Attached is the linker file I am using.

    Thanks,
    Alexey.

    2837x_RAM_lnk_cpu1.zip

  • Alexey,

    Where did you add the delay? Can you increase the RPT count after PLL disable code inside the PLL setup function.

    //

        // Turn off PLL
        //
        ClkCfgRegs.SYSPLLCTL1.bit.PLLEN = 0;
        asm(" RPT #20 || NOP");
    Increase the RPT count from 20 to big number like 256 or 512 and see if that helps.
    Regards,
    Vivek Singh

  • Alexey, any update on this one?
  • Alexey, I am marking this to be resolved. If it's not then please re-open this post or start a new one with further detail.

    Regards,
    Vivek Singh