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TMS320F28375S: TZCTL - Are Trip Zone Configurations Redundant?

Part Number: TMS320F28375S

Hi,

This is a conceptual question about the trip zone module used with PWM signals, not based on a single specific issue.  In the TZCTL register, there are 6 different configurable fields:

  • DCAEVT1
  • DCAEVT2
  • DCBEVT1
  • DCBEVT2
  • TZA
  • TZB

I can't figure out the purpose of the DCxEVTy configurations, as in my experiments they have no effect.  I have DCAEVT1 set up as a trip signal.  If I set DCAEVT1 to force the PWM signal low, and set TZA to have no effect, then the trip never fires.  For it to work, I need to set TZA to force the PWM low as well.

However, if I set TZA to force the PWM signal low and leave DCAEVT1 set to have no effect, then the signal still trips.  So effectively, it doesn't matter what DCAEVT1 is set to, as the trip is governed entirely by TZA.

Is that the correct interpretation?  Do DCAEVT1 and the rest have any practical purpose?

Thanks,

Jeff

  • Jeff,

    The TZx signals have priority over the DCxEVTy signals, and their relationship can be somewhat confusing.

    1. If a DC event is setup as a TZ event, and the DC event forces the PWM low and the TZ forces the PWM high, then the TZ event will take priority.
    2. If a DC event is setup as a TZ event, and the DC event forces the PWM low and the TZ is set to “Do Nothing”, then the DC even should take effect.
    It sounds like you have attempted to configure #2 above and its not working, is that correct?
    Have you verified if the DCAEVT1 is correctly triggering?
    Do note: The Actions for a DCxEVTy event have to be configured separately from the TZ actions unless you are using the DCxEVTy signal as an input to the CBC or OSHT trip logic. This can be done in the TZCTL register.
    Regards,
    Cody 
  • Cody,

    That all makes sense.  I'm pretty sure I have it configured for scenario 2 that you outlined; here is the code used to do that.

    {
        EALLOW;
    
        /* Clock config */
        ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0u; /* EPWMCLK = PLLSYSCLK / 1 = 200MHz */
        EPwm1Regs.TBCTL.bit.CLKDIV = 7u;    /* Set CLKDIV = 8 */ /* PWM1 CLK = 111607Hz */
        EPwm1Regs.TBCTL.bit.HSPCLKDIV = 7u; /* Set HSPCLKDIV = 1 */
    
        /** - Clear counter */
        EPwm1Regs.TBCTR = 0u;
    
        /** - Set control actions */
        EPwm1Regs.AQCTLA.bit.CAU = PWM_ACTION_CLEAR;
        EPwm1Regs.AQCTLA.bit.ZRO = PWM_ACTION_SET;
    
        /** - Set period for 1ms */
        EPwm1Regs.TBPRD = 700u;
        EPwm1Regs.CMPA.bit.CMPA = 350u;     /* Set duty cycle to 100% */
    
        /** - EPWM XBar config for TRIP4 */
        EPwmXbarRegs.TRIP4MUX0TO15CFG.bit.MUX7 = 1u;    /* Select INPUTXBAR4 (MUX7.1) */
        EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX2 = 0u;      /* Disable MUX2 */
        EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX7 = 1u;      /* Enable MUX7 */
    
        /** - Digital Compare A config */
        EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = 3u;       /* Select TRIP4 as DCAH source */
        EPwm1Regs.DCAHTRIPSEL.bit.TRIPINPUT4 = 1u;      /* Enable TRIP4 as trigger */
        EPwm1Regs.TZDCSEL.bit.DCAEVT1 = 2u;             /* Trigger on DCAH high */
    
        /** - Select DCAEVT1 as oneshot source */
        EPwm1Regs.TZSEL.bit.DCAEVT1 = 1u;
    
        /** - Configure input Xbar to read from OV pin */
        InputXbarRegs.INPUT4SELECT = PWM_DEMO_PIN_OV;
    
        /** - Configure DCFWINDOW for 100us blanking */
        EPwm1Regs.DCFWINDOW = 11u;                      /* ~98.56us but whatevs */
        EPwm1Regs.DCFOFFSET = 0u;
        EPwm1Regs.DCACTL.bit.EVT1SRCSEL = 1u;           /* Select DCEVTFILT as source for DCAEVT1 */
        EPwm1Regs.DCFCTL.bit.PULSESEL = 1u;             /* Align window to TBCTR = 0 */
        EPwm1Regs.DCFCTL.bit.SRCSEL = 0u;               /* Select DCAEVT1 to filter */
        EPwm1Regs.DCFCTL.bit.BLANKINV = 0u;
        EPwm1Regs.DCFCTL.bit.BLANKE = 1u;               /* Enable blanking */
    
        /** - Enable ePWM1A */
        EPwm1Regs.TBCTR = 0u;
        EPwm1Regs.TBCTL.bit.CTRMODE = 0u;
    
        /** - Configure trip control actions */
        EPwm1Regs.TZCTL.bit.TZA = 3u;
        EPwm1Regs.TZCTL.bit.DCAEVT1 = 2u;
        EDIS;
    }
    

    The only additional detail is that in this configuration I'm trying to create a blanking window, and so really the source of the trip is DCAEVTFLT, not just DCAEVT1.  With this code, no trip action is taken, but in TZFLG the bits DCAEVT1 and OST both indicate a trip occurred.

    Is there a flaw in the code I used above?

  • Jeff,

    can you highlight the path that you are trying to setup on the trip-zone submodule diagram below?

    Also I would recommend that you disable the DC event filter until you verify that you have everything setup correctly. You could be checking for trigger events that have been filtered, even if the window is only:

    Jeff Campbell91 said:
    /* ~98.56us but whatevs */

    Regards,
    Cody

  • Cody,

    The path I'm trying to activate would be as follows:

    To that end, this is how I've configured the code (removing filtering for now as per your suggestion):

            /* Section: GPIO Config */
    
            /** - Configure OV switch pin */
            GPIO_SetupPinMux(PWM_DEMO_PIN_OV, GPIO_MUX_CPU1, 0u);
            GPIO_SetupPinOptions(PWM_DEMO_PIN_OV, GPIO_INPUT, GPIO_SYNC);
    
            /** PWM Setup: */
    
            /** - Initialize GPIO for ePWM1A */
            InitEPwm1Gpio();
    
            /* Section: PWM config */
    
            EALLOW;
    
            /** - Set ePWM clock divider */
            ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0u; /* EPWMCLK = PLLSYSCLK / 1 = 200MHz */
    
            /** - Set clock dividers and count mode */
            EPwm1Regs.TBCTL.bit.CLKDIV = 7u;    /* Set CLKDIV = 8 */ /* PWM1 CLK = 111607Hz */
            EPwm1Regs.TBCTL.bit.HSPCLKDIV = 7u; /* Set HSPCLKDIV = 1 */
    
            /** - Clear counter */
            EPwm1Regs.TBCTR = 0u;
    
            /** - Set control actions (full on) */
            EPwm1Regs.AQCTLA.bit.CAU = PWM_ACTION_CLEAR;
            EPwm1Regs.AQCTLA.bit.ZRO = PWM_ACTION_SET;
    
            /** - Set period for 1ms */
            EPwm1Regs.TBPRD = 700u;
            EPwm1Regs.CMPA.bit.CMPA = 350u;     /* Set duty cycle to 50% */
    
            /* Section: Trip config */
    
            /** - Configure input Xbar to read from OV pin */
            InputXbarRegs.INPUT4SELECT = PWM_DEMO_PIN_OV;
    
            /** - EPWM XBar config for TRIP4 */
            EPwmXbarRegs.TRIP4MUX0TO15CFG.bit.MUX7 = 1u;    /* Select INPUTXBAR4 (MUX7.1) */
            EPwmXbarRegs.TRIP4MUXENABLE.bit.MUX7 = 1u;      /* Enable MUX7 */
    
            /** - Digital Compare A config */
            EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = 3u;       /* Select TRIP4 as DCAH source */
            EPwm1Regs.DCAHTRIPSEL.bit.TRIPINPUT4 = 1u;      /* Enable TRIP4 as trigger */
            EPwm1Regs.TZDCSEL.bit.DCAEVT1 = 2u;             /* Trigger on DCAH high */
    
            /** - Select DCAEVT1 as oneshot source */
            EPwm1Regs.TZSEL.bit.DCAEVT1 = 1u;
    
    
            /** - Configure trip control actions */
            EPwm1Regs.TZCTL.bit.TZA = 3u;                   /* Ignore TZA */
            EPwm1Regs.TZCTL.bit.DCAEVT1 = 2u;               /* Force low on DCAEVT1 */
    
            /** - Enable ePWM1A */
            EPwm1Regs.TBCTR = 0u;
            EPwm1Regs.TBCTL.bit.CTRMODE = 0u;
    
            EDIS;
    

    With this configuration, I can observe the trip event DCAEVT1 firing, but no effect on the PWM signal.  I can fix this by setting TZCTL[TZA] to 2 (force low) or 0 (HiZ mode), but it seems like this should be able to work.

  • Jeff,

    you have partially configured 2 was of tripping the PWM.

    1. The fully setup way is using DCAEVT1 directly, this is highlighted in orange.
      1. This will not latch and is only instantaneous while the event is active, if this occurred during a low time you would never see it.
      2. This can also be over ridden by the TZx event if it is not set to "Do-nothing"
    2. The partially setup route is the TZA path that you have highlighted in yellow. 
      1. It looks like you have configured everything for the OSHT trip except for the action (TZCTL.bit.TZA). This is why it appears to work when you enable TZA.

    I believe your confusion is because DCAEVT can be used to trip the PWM directly OR used as a TZA trip source for the OSHT trip logic.

    Regards,
    Cody 

  • Cody,

    That clears things up significantly. I disabled the OSHT logic entirely and it started to work like I'd expect. You're right, it was that dual-possibility routing that had me confused.

    Thanks for the help!
    Jeff
  • Wonderful, glad I could help!

    Do you think it would help other customers if I go and add in some extra verbiage around the trip-zone logic?

    And of course, if you have any other questions feel free to start another thread.

    Regards,
    Cody
  • I think it would help, yes. It was difficult to see on my first read that the DC events could be used directly or as inputs to TZA/B; it looks like that was only hinted at by the block diagram.