This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/F28M35H52C: float (32bit ) operation in the 16bit extended ram

Part Number: F28M35H52C

Tool/software: Code Composer Studio

  I can use a 16 bit extend ram ,when my program like the below. (int is  16 bit )

    int *T;
    int T1=0;
    T= 0x300000;
    *T =  1 ;
    *(T+1) = 2;
    T1= *T;//**************T1=1;
    T1= *(T+1);//*************T1=2;

but if  my program like this , it will be worry.(long is 32bit )

    long *T;
    long T1=0;
    T= 0x300000;
    *T =  0x1234567 ;
    *(T+1) = 0x2345678;
    T1= *T;//*****************T1=0x 4567 0000
    T1= *(T+1);//***********  T1=0x  5678 0000

 please  help me solve the problem ,thank you 

  • HI '8342,

    What happens if you define the long as unsigned as use all 32-bits? e.g.

    unsigned long *T;
    unsigned long T1=0;
    T= 0x300000;
    *T =  0x12345679 ;
    *(T+1) = 0x23456789;
    T1= *T;//*****************T1=???
    T1= *(T+1);//***********  T1=???

    Will incrementing T by 2 or 4 ensure that the memory addresses are aligned to a 32-bit boundary?

    unsigned long *T;
    unsigned long T1=0;
    T= 0x300000;
    *T =  0x12345679 ;
    *(T+2) = 0x23456789;
    //*****************(T+2)=??? address
    T1= *T;//*****************T1=??? 

    T1= *(T+2);//*********** T1=???

    ------------

    unsigned long *T;
    unsigned long T1=0;
    T= 0x300000;
    *T =  0x12345679 ;
    *(T+4) = 0x23456789;
    //*****************(T+4)=??? address
    T1= *T;//*****************T1=???

    T1= *(T+4);//*********** T1=???
  • I have made the test ,the below program is the result;

    unsigned long *T;
    unsigned long T1=0;
    T= 0x300000;
    *T = 0x1234567 ;
    *(T+1) = 0x2345678;
    T1= *T;//***************T1=0x4567 0000
    T1= *(T+1);//*************T1=0x5678 0000

    unsigned long *T;
    unsigned long T1=0;
    T= 0x300000;
    *T = 0x1234567 ;

    //*************(T+2)=0x300004
    *(T+2) = 0x2345678;
    T1= *T;;//***************T1=0x4567 0000
    T1= *(T+2);//*************T1=0x5678 0000

    unsigned long *T;
    unsigned long T1=0;
    T= 0x300000;
    *T = 0x1234567 ;

    //*************(T+4)=0x300008
    *(T+4) = 0x2345678;


    T1= *T;;//***************T1=0x4567 0000
    T1= *(T+4);//*************T1=0x5678 0000

    now, I still can't find the anwser

  • I alse think that if the configuration of the EPI have some problem. the program is Refer to the routine in the controlSUTIE  ,as the below.

    can you sure if there is problem?

    void EPI_set(void)
    {

    EPIModeSet(EPI0_BASE, EPI_MODE_HB16);

    EPIDividerSet(EPI0_BASE, 0x1);

    EPIConfigHB16Set(EPI0_BASE, (EPI_HB16_MODE_ADDEMUX | EPI_HB16_WRWAIT_0 | EPI_HB16_RDWAIT_0), 0 );

    EPIAddressMapSet(EPI0_BASE, (EPI_ADDR_RAM_SIZE_16MB|EPI_ADDR_PER_SIZE_16MB|EPI_ADDR_CODE_SIZE_16MB |EPI_ADDR_PER_BASE_E| EPI_ADDR_RAM_BASE_68) );

    HWREG(EPI0_BASE + EPI_O_HB16CFG2) = (EPI_HB16CFG2_CSCFGEXT |EPI_HB16CFG2_CSCFG_ADCS);

    }

  •  I find that the data which is writed in the extended ram have the same prolem.  the heigh 16bit date can be write  the low 16bit can be write.

    it is means  at 

    the address     the data 

    0x300000      5679 0000  

    0x300004      6789  0000

  • user5358342,

    Can you describe the memory component that you are using with EPI?

    -Tommy

  • CY7C1041CV33-TS0PII44

  • EPIAddressMapSet(EPI0_BASE, (EPI_ADDR_RAM_SIZE_16MB|EPI_ADDR_PER_SIZE_16MB|EPI_ADDR_CODE_SIZE_16MB |EPI_ADDR_PER_BASE_E| EPI_ADDR_RAM_BASE_68) );

    Please double-check your address base value.  EPI_ADDR_RAM_BASE_68 is not valid.

    HWREG(EPI0_BASE + EPI_O_HB16CFG2) = (EPI_HB16CFG2_CSCFGEXT |EPI_HB16CFG2_CSCFG_ADCS);

    This register write is overwriting your settings from EPIConfigHB16Set().

  • If you are still having issues, please provide the signal mapping that you are using between the SRAM pin names vs the F28M35H52C pin names.
  • it means Only to be used with Host Bus quad chip select. In quad chip select mode, CS0 maps to
    0x6000.0000 and CS1 maps to 0x8000.0000

    -----so  there is no problem , I have made the right configuration.

    "This register write is overwriting your settings from EPIConfigHB16Set()."
     
    In fact , the register is not be configuration at the EPIConfigHB16Set(). but  I fond the anwser is that  I am not setting the EPI_O_HB16CFG2
    Thank you for you anwser ,   I am very  appreciate.