I am working with a code in which serial packets are receiving and transmitting. For reception there are time outs between each bytes for multi byte reception. So i need to enable and disable timer interrupts after each byte of reception. I have enabled a non fifo based reception with RX_RDY break detect interrupt. For a configuration of 8 data bit , none parity and stop bit 2, with baudrates less than 115200, i am able to receive each bytes successfully from SCIRXBUF register after each interrupt. But for baud rate 115200, it seems the bytes are getting corrupted after the reception of fist byte (which is correct) even if the interrupts are triggering correctly. For other configurations like stop bit = 1 or parity = odd/ even same issue is happening for all the baud rates and when i checked the flag register, it is seen that the Frame error bit is set. For transmission no error is happening and bytes are sending successfully. It seems the configuration is correct. What could be the issue ? I am using LAUNCHXL-F28377S development kit with 3.3 V FTDI cable . Port used is SCI base C with GPIOs 89(tx) and GPIO 90( rx).
On further check it is seen that the stop bit for reception is only detecting if the number of stop bits are equal to 2 even though the controller is configured for stop bit = 1 (in transmission stop bit 1 is correctly sending)