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TMS320F28069: relation among the ePWM interrupt

Hisui Yan
Prodigy 180 points
Part Number: TMS320F28069


The technical reference manual (in the page of Figure 3-44. Event-Trigger Interrupt Generator) said "If interrupts are enabled, but the interrupt flag is already set, then the counter will hold its output high
until the ENTFLG[INT] flag is cleared. This allows for one interrupt to be pending while one is serviced." So, I can use ETCLR.bit.INT to clear the register manually to allow further interrupt pulses. 

But, my question is when an interrupt triggered by EPWM1 is working, what will happen if another EPWM2-based interrupt is triggered? Will the EPWM2-based interrupt wait until EPWM1-based interrupt finish or the EPWM2-based interrupt will be neglected?

  • 0
    TI__Mastermind 42195 points

    Qichen,
    as long as you are correctly acknowledging the ePWM1 interrupt then it will not clear the ePWM2 interrupt. If ePWM2 interrupt is not cleared then it will be serviced as soon as the CPU can process it.

    Do note that ePWM2 will not preempt the ePWM1 interrupt.

    Regards,
    Cody