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TMS320F28034: Missing Clk Limp Mode behavior

ngohara1991
Intellectual 555 points

Part Number: TMS320F28034

Hello,

I am trying to confirm some of the behavior of the Limp Mode clock when an external crystal hardware fails and MCLKRS is cleared (active low, right?).

So, we have an external i2c eeprom we use to log faults, where the I2C speed is controlled by the uCPU. 

In the event of the external crystal failing, we expected to be able to continue writing to the eeprom use the Limp Mode clock as the peripheral clock source. 

However, this does not appear to be happening with our current code.

So my questions are:

Can the Limp Mode clock drive the peripheral clocks sources?

Is this peripheral clock source not auto set to Limp Mode through OSCCLK when MCLKRS occurs?

(IE, do we have to have extra behavior on our end to enable the periph clocks again for some reason?)

Are there any other knock-down affects of MCLKRS that I might be missing?

We have fault code to prevent catastrophic behavior in the event of MCLKRS so that is not a problem, we are just trying to make sure our fault logging is working so we can understand what the problem was in the case we can bring the board back alive. 

Thank you for any help

Neal

  • 0
    TI__Guru* 95315 points
    Are you using the TRM we published in December, SPRUI10? It describes the behavior of the missing clock circuit for various cases.
  • 0 in reply to Hareesh Janakiraman
    Guru 30330 points
    Following Hareesh's question, I think that "Case D: OSCCLKSRC2 (INTOSC2, or X1/X2 or XCLKIN) is used as the clock source. NMIWD is enabled (NMIRESETSEL = 1)” is the situation you are facing.

    Basically, the Device operational frequency will change. Because of that, the I2C clock frequency will no longer match what it was before. Have you scoped the SCL pin, or XCLKOUT when the Clock failure occurs?
    To directly answer at least part of your questions, the Peripheral Clocks do not get masked, so you will not need to re-enable them, but you will need to reconfigure your clocking of them. However, I would also ensure that the rest of your system is gracefully shut down, as a failed clock is not a good sign.

    -Mark
  • 0 in reply to Mark Labbato
    TI__Guru* 95315 points
    Neal,
    I hope you had a chance to review the Missing-Clock section in the new TRM and the material is clear to you. Also, I wanted to bring your attention to the fact that the limp-mode frequency is a range (1 to 5 MHz, as shown in Table 5-6 of SPRS584M) and not a precise value. Please bear this in mind if you are attempting any serial communication in that mode. The limp mode aids in a graceful shutdown of the system; application operation in that mode is not intended.