TMS320F28379D: Using SDFM with AMC1305 EVM

Hi Wang,

The set MF flag means the modulator clock(SD-Cx) is failing or missing. Please check your clock related configurations for AMC1305.

Thanks

Vasudha

Hi Vasudha,
As you can see, I can observe CLK signal on SD-Cx pin(V1 in the picture), and the clock is generated by 28379D itself.
So we definitely have modulator clock.

Could you please help to identify other possible reasons?

Wang,

Is your PWM configured to run as a free running clock? If your PWM is configured to stop when emulation event occurs (breakpoint happens), then PWM will stop toggling and appear as modulator clock failure (MFx bit). Check the contents of TBCTL.FREE_SOFT register?

Regards,

Manoj

Thanks Manoj,

According to your guidance, I set the TBCTL.FREE_SOFT to run free mode.

And the SDFM is able to work.

However, I met another problem here:

When I try to read the result of SDFM from *(volatile Uint16 *)0x5E27, I only get 0 all the time.

I am usting sin3 filter and 16bits-mode OSR256, which means the result need to be shifted 9 bits.

When I look into the SDDATA2 register, I see the result shown in the picture.

My question is: Is the result in SDDATA2 shifted or unshifted? Do I need to shift manually to get the correct result?

Hi,

You need not shift manually to get the result but the required shift needs to configured in SDDPARM1.bit.SH bit during initializations.

Thanks
Vasudha

Hi Vasudha,

Thanks for your reply.

I noticed a chart in the RTM showing the relationship between required shift bit, filter type and OSR.

If I set the right shift during initialization, which register represents the right result? The Data32HI or Data16?

Regards,

Brian