TMS320F280049: CPU timers performancies

yann volpelier

Part Number: TMS320F280049
Other Parts Discussed in Thread: C2000WARE

I have run the example on CPU timer provided in C:\ti\c2000\C2000Ware_1_00_06_00\driverlib\f28004x\examples\timer on an ExperimenterKit with ControlCARD.

On INT function cpuTimer0ISR instead of counting the INT the pin GPIO04 is toggled.

Here are my test results for several expected frequencies:

Frequency Timer expected ; Obtained frequency

1 kHz ; 1 kHz

100 kHz ; 98-100 kHz

500 kHz ; 496-502 kHz

1 MHz ; 0.99-1.01 MHz

1.5 MHz ; 1.07 MHz

2 MHz ; 1.07 MHz

4 MHz ; 768 kHz

Config : 100MHz SYSCLK frequency

#define DEVICE_SETCLOCK_CFG (SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(10) | SYSCTL_FMULT_NONE | SYSCTL_SYSDIV(2) | SYSCTL_PLL_ENABLE)

#define DEVICE_SYSCLK_FREQ ((DEVICE_OSCSRC_FREQ * 10 * 1) / 2)

#define DEVICE_OSCSRC_FREQ 20000000U

configCPUTimer(CPUTIMER0_BASE, DEVICE_SYSCLK_FREQ, 1000000.0/samplingFreq_hz)

Could you explain me the limitation over 1 MHz ?

Thanks

Yann

over 6 years ago

0 Ozino Odharo over 6 years ago

TI__Mastermind 20724 points

Yann,

An expert has been assigned to this post will get back to you with an answer shortly.

Regards,
Ozino

0 Nirav Ginwala over 6 years ago

TI__Genius 15385 points

Hi Yann,

What is the value of "samplingFreq_hz"? Is it same as expected frequency?

Regards,
Nirav

0 yann volpelier over 6 years ago in reply to Nirav Ginwala

Prodigy 180 points

Hi Nirav
Yes, samplingFreq_hz is the expected frequency.
Regards

0 Nirav Ginwala over 6 years ago in reply to yann volpelier

TI__Genius 15385 points

Hi Yann,

Ok, what is the configuration of TCR register?

Regards,
Nirav

0 yann volpelier over 6 years ago in reply to Nirav Ginwala

Prodigy 180 points

0 Nirav Ginwala over 6 years ago in reply to yann volpelier

TI__Genius 15385 points

Hi Yann,

I assume you are obtaining frequency by looking at the GPIO04 signal on the scope? If so can you send some scope captures.

Also, can you run the CPU timer in "Free Run" mode:

CPUTimer_setEmulationMode(cpuTimer,
CPUTIMER_EMULATIONMODE_RUNFREE);

Regards,
Nirav

0 yann volpelier over 6 years ago in reply to Nirav Ginwala

Prodigy 180 points

Here is the scope capture on HSEC pin 50 in free run mode. The frequency to reload the timer is set to 4MHz.

The GPIO is toggling at 770 kHz as you can see on the capture

Regards

0 Nirav Ginwala over 6 years ago in reply to yann volpelier

TI__Genius 15385 points

Hi Yann,

Going through your data and doing math, here is the problem:

Every time when CPU timer expires and generates an interrupt it goes into ISR routine where you toggle the GPIO and clear the interrupt so that on the next iteration it comes back in the ISR and toggles the GPIO, which you measure to confirm the configured frequency.

At higher frequency i.e. 4Mhz the CPU timer count is low i.e. 25 Vs at lower frequency i.e 1MHz it is 100. It appears that overhead to toggle GPIO and clear interrupt is higher than 25 cycles, hence it does not go into the ISR for higher frequency configuration every time it expires, and hence the GPIO toggle does not correlate with the configured CPU timer value. Unfortunately the delay in servicing interrupt and toggling GPIO is fixed in HW, which cannot be reduced. So with using CPU timers to generate accurate pulse is limited to lower frequency configuration.

Instead we recommend you use EPWM to generate more accurate pulse which does not have such limitation.

Let us know if you need help with EPWM configuration, also you can refer to TRM for more details.

Regards,

Nirav

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TMS320F280049: CPU timers performancies