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TMS320F28335: BSDL file clarification

domenyko
Genius 9655 points
Part Number: TMS320F28335


Dear all,

One of my AA has to implement the boundary scan through JTAG controller.

In a note of the BSDL file of the TMS320F28335, it is written that :

F33x Devices have two taps - one for the CPU and one for  the boundary scan.

The bounday scan IR size is 3 bits.

Whhat does it mean ? Are 2x BSDL file required ? or are the TAPs transparent for the user ?

Moreover in order to enter in boundary scan test the following configuration must be used:

EMU1 = 0;

EMU0 = 1

XRSn = 1

TRSTN = 0 to 1

On the bord TRST is pulled down, does the 0 to 1 transition will be automatically happen at power up of the board ?

regards,

Domenico

  • 0
    TI__Expert 8105 points
    Domenico,

    You can use the JTAG port on the TMS320F28335 to either connect the emulator and load/debug your code, or to connect the BSDL tool to drive and observe data on the IC device pins. The later is typically used to verify that there are no shorts or opens on board traces that connect various pins of various devices. This is done by driving a given trace from one pin and observing the expected value on the pin at the other end of that trace. In order to accomplish that you need a BSDL tool (such as ones made by XJTAG), and a BSDL file for each chip present in the scan chain on your board). The BSDL file for TMS320F28335 is located in the product folder on TI.com. The BSDL tool knows how to use the JTAG port and the associated signals to establish BSDL communication.

    REgards,
    PEter
  • 0 in reply to Peter Galicki
    Prodigy 10 points
    Good evening Peter.
    The signal TRST, I have to drive it as a transition from 0 to 1 or when the board is turned on, the signal trst goes to 1 alone ?.
    Before the TRST signal transition, the compliance pins emu0, emu1, xrsn must already be with the logical level indicated in the bsdl file?
  • 0 in reply to alberto lombardi
    TI__Expert 8105 points
    Alberto,

    Normally the TRSTn signal is pulled low so that the MCU operates on its own and the emulation circuitry inside the MCU is in the reset state (inactive). When the emulator is cable is plugged into the board, the emulator can drive the TRSTn high - this overcomes the pulldown and takes the emulation circuitry inside the MCU out of reset, and the emulation circuitry then takes control of program loading, execution, single-stepping etc. The emulation circuitry inside the MCU can operate in several modes. The EMU0/EMU1 input pins determine the state in which the emulation circuitry comes up when TRSTn signal becomes high, therefore these 2 inputs must be in the proper state when TRSTn signal transitions from low to high.

    Regards,
    Peter