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TMS320F28335: SRAM interface for FFT

Part Number: TMS320F28335

Hi,

I am planning to do a real time FFT on 2 channels, the spectrum and peaks I need to monitor is around  2Khz. Planning to use internal ADCs 16/12 bit. 2048 point FFT.

I think the internal memory (SRAM) seems to be not sufficient for this task.

I want to know how easy to add external SRAM and can I use it in real time for FFT application on TMS320F28335?

thanks,

  • chaitanyab,

    F28335 has an XINTF peripheral that is designed to interface with standard asynchronous SRAMs.  The usable memory space is extended relatively seamlessly once the XINTF has been configured.  Be sure to check the Errata for known issues.

    Do note that the ADC only supports 12b conversions.

    -Tommy

  • Chaitanya,

    2 2048 point FFTs on 16-bit data through the ADC would require 2 x 2K x 16 x (2 + 1) = 12K x 16 words. The input requirement would be doubled for Ping-Pong buffer implementation. The 28335 has 34K x 16 of SARAM.

    Why do you feel you will have a shortage? (I don't know much else about your application and SRAM utilization, but I'm speaking purely from an FFT implementation standpoint. Note the above does not take into consideration TwiddleFactor tables. That will be an extra 2 x 2K x 16)

    Thanks,
    Sira
  • Yes I agree but my application will also required some RAM. Overall how is the performance of external SRAM controller? Can the external SRAM used for real time FFT work? It doesn't seems to have address bus and data bus type of pins from the controller so this modified XNTF how good is it especially like DMA performance etc and overall? or it just a provision for slow data access and storage?
  • chaitanyab,

    XINTF does have an address and databus. You can find the XAn and XDn pin assignments in the datasheet under the Terminal Configuration and Functions chapter. The module is further described in the XINTF Reference Guide. The read and write operation timings are software configurable in increments of SYSCLK ticks.

    Throughput will vary significantly depending on level of optimization. Using the DMA with 32b memories would theoretically peak around 100MB/s. For planning purposes, I recommend keeping expectations at around 40MB/s for 32b memory and around 25MB/s for 16b memory.

    -Tommy